1. Characterization Presentation Spring 2006 Implementation of generic interface To electronic components via USB2 Connection Supervisor Daniel Alkalay System architectures Roee Cohen Rami May Technion – Israel Institute of Technology Department of Electrical Engineering High-Speed Digital Systems Lab

2. AGENDA Project Goals Possible application Background & Motivation System Architecture System Interface Schedule

3. Project Goal Development and implementation of generic interface system between PC via USB2 and electronic components Possible application Test and evaluation of electronic components. Verification of new electronic components according to their Data-Sheet. Controlling electronic component. Perform configurations and operate of electronic component. sampling and Analyzing of analog signals by PC.

4. Background & Motivation Connection via USB is much more flexible and general than dedicating appointed computer or RS232 for this tasks. The need to verify the performance of component before implementation in a complex systems. Low cost FPGA evaluation board with USB gives us accessible connection to every PC.

5. System Architecture FPGA D/A (T.I) Analog signal USB2 50Mhz A/D (T.I) Electronic component PCB card Function generator

6. System Interface Input : –From PC : configuration command from the user to the electronic device. configuration command from the user to the to the FPGA. analog or digital signals to operate the device. –From electronic device : digital signals from the system. Output: –display of analog signals on the PC screen. –Configuration of devices. –Controlling commands that operate the device.

7. Schedule Learning programs language and the evaluation environment : VHDL, ISE, LAB-VIEW, HDL designer, MATLAB,A/D converter, XILINX SPARTAN 3E. Weeks 1-6 : Demonstration of basic operation of all the data flow : PC => USB => FPGA => led’s Weeks 7-8 : Midterm reportWeek 10: learning the USB and devices protocols.Weeks 11-12 Design the GUI & FPGA interfacesWeeks 13-14 Design the major blocks of the FPGA and GUI.Weeks 14-17 Midterm PresentationWeeks 18 Implementing FPGA and GUIWeeks 18-23 Debugging and Simulating.Weeks 24-27 Final PresentationWeeks 28