1. Performed by: Daniel Heifetz, Vladimir Lifliand Instructor: Dimitry Sokolik המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל Technion - Israel institute of technology department of Electrical Engineering דו ” ח סיכום פרויקט ( חלק א ’) Subject: Project name סמסטר ( חורף ) שנה 2001/2002 1

2. Abstract המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 2 The purpose of the system is to transfer the picture produced by the Kirilian camera to the PC for image processing and research. This is done using a CCD sensor and interface circuitry. The system is connected to the PC using the very popular and widely used USB interface.

3. System description המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 3 Main components of the system: 800x600 CCD sensor, FIFOs which receive the image from the CCD, USB bus controller for PC interfacing and ALTERA FPGA to control all of the above. When a command is received from the PC software through the USB bus, CCD takes a picture which is stored immediately in the FIFO’s. Then the picture is transferred to the PC using the USB controller and can stored or displayed. The transfer speed is limited by the USB bus throughput which is 12Mbit/sec max. The ALTERA component leads the process decoding the commands sent from the PC, controlling the CCD sensor the FIFOs and the USB controller.

4. Specification המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory OmniVison 800x600 CCD sensor, OKI 2x 1Mbit FIFO, Flex 10K50 Altera, ScanLogic SL811S USB slave controller. Windows client application, written using MFC. 4

5. System Block Diagram המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 5

6. FPGA Block Diagram המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 6 SL811S I/O module SL811S init module SL811S Interrupt decoder Function EP0 (setup/control) Function EP1 (Read) Function EP2 (Write) Data[7..0] Command[7..0] To SL811S chip From FIFO Internal bus and inter-block controls Data[7..0] FIFO control USB resuest decode SCCB bus To FIFO To Sensor Camera control unit FIFO control unit