1. 1 Chapter 4 Combinational and Sequential Circuit

2. 2 Topics Combinational Circuit and Sequential Circuit Criterions Some Examples of Combinational Circuit: Parallel Adder, Decoder, etc Some Examples of Sequential Circuits: Flip-flop, Register, Serial Adder, etc.

3. 3 Combinational vs Sequential Circuit A B F C D Combinational Circuit -output determined solely by inputs Sequential Circuit -output determined by inputs AND previous outputs A B F C

4. 4 Combinational Logic circuit contains logic gates where its output is determined by the combination of the current input, regardless of the output or the prior combination of input. Basically, combinational circuit can be depicted by Diagram 1 below: n input m output combinational circuit Examples of Combinational circuits in the computer system are decoder, parallel adder, and multiplexer. (Note: Students are encouraged to obtain examples of combinational circuits stated above) Combinational Circuit

5. 5 Sequential Logic Circuit contains logic gates arranged in parallel and its output is not only determined by the combination of the current input, but also the prior output. The circuit also contains memory elements that enable it to store the information of the prior output. Sequential Circuit n input m output sequential logic circuit memory elements Examples of sequential circuits in the computer system are like registers, counters and serial adders.

6. 6 Some Examples of Combinational Circuit: Parallel Adder, Decoder, etc The circuits learnt in chapter 3 are combinational circuits. The steps to design combinational circuits are as the following: 1. Understand the problem 2. Determine the number of input and output variables that are needed 3. Give symbols for the stated input and output 4. Construct a truth table that defines the relationship between the input and output 5. Obtain the Boolean function or the logical expression from the truth table in (4) using Karnaugh Map or other known methods. 6. Draw a logic circuit based on the expression obtained from (5) above. (Note : Alarm System in Chapter 3 is an example of designing a combinational circuit )

7. 7 Adder is based on the addition of the binary system. For example, 1+0=1, 1+1=10, 1+1+1=11 There are 2 kinds of addition, which are identified to be half addition and full addition. Half addition is the addition of 2 bits data (doesn’t involve carry) that produces 2 bits outputs, that is the result and the carrier. For example, 1 + 1 = 0 carry 1 Full addition is the addition of 3 bits data (2 bits data and 1 bit carry) that produces 2 bits outputs (sum and carry). Logic circuit for half addition is known as Half Adder while the logic circuit for full addition is known as Full Adder. Adder

8. 8 Designing a Circuit for Half Adder The steps are as below: 1.Problem: to build a logic circuit for the addition of 2 bits data 2.Number of input : 2; Number of output : 2 3.Variables for input: x and y Variables for output : s (sum) and c (carry) 4.The Truth Table for the problem : INPUTOUTPUT xysc 0000 0110 1010 1101

9. 9 0 1 0101 x y 1 1 _ _ s = x y + x y = x  y For s 0 1 0101 x y 1 c = x y For c 5. The expressions for s and c using Karnaugh Map

10. 10 6. A logic circuits for Half Adder (HA) x y _ _ s = xy + xy c = xy OR x y x  y = s xy = c

11. 11 A Block Diagram for HA is as below: x y s c HA inputoutput

12. 12 Designing a Circuit for Full Adder (FA) The same method used to design HA. 1.Problem: Build logic circuit for the addition of 3 bits data 2.Number of input : 3 Number of output : 2 3.Variables for input: x, y and c i Variables for output : s (sum) and c o (carry)

13. 13 INPUTOUTPUT xycici scoco 00000 00110 01010 01101 10010 10101 11001 11111 5. Obtain the expression for r and c o using Karnaugh Map (Students are required to try this out themselves): will obtain s = x y p i + x y c i + x y c i + x y c i = x  y  c i and c o = x y + y c i + x c i 4.The truth table for the problem :

14. 14 6. Draw the circuit for FA (Students are required to try this out themselves): Generally, the block diagram for FA is shown as below : x y s FAinput output coco cici

15. 15 To construct a 4-bit parallel adder, 3 FA and 1 HA are required like the diagram below with the input as X = x 3 x 2 x 1 x 0 and Y = y 3 y 2 y 1 y 0 (X and Y are binary numbers 4-bit) and the output (addition result) is s 3 s 2 s 1 s 0. x 3 y 3 FA HA x 2 y 2 x 1 y 1 x 0 y 0 c 3 s 3 c0c0 s0 s0 c2c2 c1c1 s2 s2 s1 s1 INPUT OUTPUT x 3 y 3 FA x 2 y 2 x 1 y 1 x 0 y 0 c 3 s 3 c0c0 s0 s0 c2c2 c1c1 s2 s2 s1 s1 INPUT OUTPUT 0 or

16. 16 Some Examples of Sequential Circuits: Flip-flop, Register, Serial Adder, etc. Sequential circuits are a kind of logic circuit where the current output not only depends on the current input but also on the past history of inputs. Another and generally more useful way to view it is that the current output of a sequential circuit depends on the current input and the current state of that circuit. The simplest form of sequential circuit is a flip-flop. Flip- flop is a kind of logic circuit that is capable of exhibiting 2 stable conditions. It is also known as 1-bit memory element and is mostly used to make important computer components such as registers, counters, memory etc.

17. 17 There are a variety of flip-flops, all of which share two properties: 1. The flip-flop is a bistable device either 0 or 1. It exists in one of two states and, in the absence of input, remains in that state. Thus, the flip-flop can function as a 1-bit memory. 2. The flip-flop has two outputs, which are always the complements of each other. These are generally labeled Q and Q.

18. 18 Table 1 shows symbolic graphic and feature table for three types of flip-flop that are S ‑ R, J ‑ K and D flip ‑ flops. Flip-flop is a form of memory element used to construct sequential circuits that are more complex, such as registers etc. Sequential circuits can be divided into: 1. Synchronous 2. Asynchronous In synchronous sequential circuit, all flip ‑ flops are moved by the same clock pulse so that all flip ‑ flops involved change simultaneously. In asynchronous circuit, the change of flip ‑ flop condition depends on the change that occurs on the input and the late time that is in the circuit.

19. 19 Clock SQ R Q JQ K Q DQ Q NameGraphical SymbolFeature Table S-R SRQ n+1 00QnQn 010 101 11- J-K JKQ n+1 00QnQn 010 101 11Change condition D DQ n+1 00 11 Table 1: Basic Flip-flops

20. 20 S ‑ R Flip ‑ flop S ‑ R flip ‑ flop has 2 inputs, S (set) and R (reset) like Diagram 3 below. In the diagram below, (also for JK and D flip-flops), they used another input called clock. It is to control the movement of input that is input will only occur when given a clock pulse (synchronous circuit) The features of S ‑ R flip ‑ flop can be depicted in Table 2 below. It can be summarized that: 1. If the value of both S and R are 0, the flip ‑ flop will remain in its present condition (either 0 or 1). 2. If S = 0 and R = 1 (reset), then the flip ‑ flop condition will change to 0 (its output, Q = 0). 3. If S = 1 (set) and R = 0, then the flip ‑ flop condition will change to 1 (output, Q = 1). 4. This circuit does not allow combinational input of input S = 1 and R = 1. SRQnQn Q n+1 0000 0011 0100 0110 1001 1011 110- 111- Table 2 : Feature table of S-R Flip-flop 1 2 34

21. 21 clock S R Q Q Diagram 3 : S-R Flip-flop control the movement of input

22. 22 J-K Flip-flop J-K flip-flop also has 2 inputs, J and K. The function of clock is same as S ‑ R flip ‑ flop. Unlike S ‑ R flip ‑ flop, J ‑ K flip ‑ flop allows all combination of inputs. It can be observed that J ‑ K flip-flop is built to address the input problem of S = R = 1 in S ‑ R flip-flop. Features 1 till 3 are same as S ‑ R flip-flop. Table 3 shows the features of J ‑ K flip ‑ flop. From the table, it can be summarized that: 1.If J = 0 and K = 0, it will maintain the flip ‑ flop condition like before 2.If J = 0 and K = 1, it will cause flip ‑ flop to change to condition 0 (reset). 3.If J = 1 and K = 0, it will cause flip ‑ flop to change to condition 1 (set). 4.If J = 1 and K = 1, it will change the flip ‑ flop condition, that is it will become complementary to the initial or prior condition JKQnQn Q n+1 0000 0011 0100 0110 1001 1011 1101 1110 1 2 34 Table 3: Features table of J-K flip-flop

23. 23 Clock J K Q Q Diagram 4: J-K Flip-flop The logic circuit for J-K flip-flop is shown in Diagram 4 below.

24. 24 D Flip ‑ flop Logic circuit for D flip ‑ flop is shown in Diagram 5. This flip ‑ flop only has one input that is D. The clock function is same as S ‑ R and J-K flip ‑ flops. The features of D flip ‑ flop can be illustrated by Table 4. From the table, it can be seen that this flip ‑ flop produces the same output as its input regardless of the condition of the stated flip-flop. This feature is very suitable to be used as memory element and this flip-flop is mostly used to make registers and computer memory (RAM) DQnQn Q n+1 000 010 101 111 Table 4 : Feature table of D Flip-flop

25. 25 clock D Q Q Diagram 5 : D Flip-flop

26. 26 Examples of Flip-flop (Sequential Circuit) usage As priory stated, flip-flop is an example of the simplest form of sequential circuit. It is also a form of memory element where a flip-flop can store 1 bit of data. In this section, examples of sequential circuits that use flip-flop will be given: 1. Register 2. Adder

27. 27 Register Register is an important component in the computer. Generally, it can be categorized into: 1. Storage Register (or Parallel Register) 2. Shift Register (or Serial Register) Parallel register is made up of a set of 1-bit (flip-flop) that can be written on and read simultaneously. This register is used to store data (output=input). The amount of flip-flop used depends on the size of the register that is to be built. If a parallel register that can store 8 bits of data is to be built, then 8 flip-flops are needed. Diagram 6 below is a 4 bit parallel register that uses flip-flop D. (Note: all kinds of flip-flop can be used to build storage register, but its circuit will differ because every flip-flop has its own features)

28. 28 Clock DQ I2I2 DQ I1I1 DQ I4I4 DQ I3I3 Q1Q1 Q2Q2 Q3Q3 Q4Q4 Pulse _Q_Q _Q_Q _Q_Q _Q_Q Diagram 6: A 4-bit parallel register that uses D Flip-flop Diagram 6 below is a 4 bit parallel register that uses flip-flop D. (Note: all kinds of flip-flop can be used to build storage register, but its circuit will differ because every flip-flop has its own features) In the above diagram, 4 bits of input is admitted simultaneously, that is I 1, I 2, I 3 and I 4, whereas its output is also is simultaneous or parallel, that is Q 1, Q 2, Q 3 and Q 4.

29. 29 In shift register, only one output is produced at a time. There are 2 types of shift register that is shift to right and shift to left. Shift to right register means the rightmost bit of the stated will be taken out first followed by the following bits after a given clock beat. It’s vice versa for move to shift to left register. Diagram 7 below is an example of 4-bit shift to right register that utilizes J-K flip-flop. Output Clock JQ K JQ K JQ K JQ K Input Clock Pulse _Q_Q _Q_Q _Q_Q _Q_Q Diagram 7: Shift to Right Register Using J-K Flip-flop

30. 30 Parallel Adder In the computer environment, there are 2 types of adders: 1. Parallel Adder 2. Serial Adder Parallel adder is an adder that performs addition concurrently for each bit involved. Adder in section 4.2 is called a serial adder. Serial Adder performs addition bit by bit starting with the rightmost bit, followed by the following bits. Diagram 8 below is an example of a serial 4-bit adder. This adder uses two Shift to Right Registers, X and Y to hold operand 1 (A = A 3 A 2 A I A 0 ) and operand 2 (B = B 3 B 2 B 1 B 0 ), a full adder and a flip ‑ flop (usually D flip-flop) to hold the carrier value.

31. 31 The addition process in the adder are as below : X = X + Y that is the X and Y registers will hold operand 1 and operand 2 and the addition result will be kept in the X register. Hence, in the addition, the value in the Y (Operand 2) register cannot change while the X register holds the addition result (the value of operand 1 will be lost) Note: observe and understand the data movement in the stated circuit after every clock pulse is given. A3A3 A2A2 A0A0 A1A1 B3B3 B2B2 B0B0 B1B1 Full Adder AiAi BiBi CiCi C i+1 SiSi D flip-flop Carry Y Register X Register Clock Pulse Diagram 8 : 4-bit Serial Adder