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Computer Architecture Lecture 18 Superscalar Processor and High Performance Computing.

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Presentation on theme: "Computer Architecture Lecture 18 Superscalar Processor and High Performance Computing."— Presentation transcript:

1 Computer Architecture Lecture 18 Superscalar Processor and High Performance Computing

2 Static Superscalar Pipeline Fetch 64-bits/clock cycle; Int on left, FP on right – Can only issue 2nd instruction if 1st instruction issues – More ports for FP registers to do FP load & FP op in a pair TypePipeStages Int. instructionIFIDEXMEMWB FP instructionIFIDEXMEMWB Int. instructionIFIDEXMEMWB FP instructionIFIDEXMEMWB Int. instructionIFIDEXMEMWB FP instructionIFIDEXMEMWB 1 cycle load delay can cause delay up to 3 instructions in Superscalar - instruction in right half can’t use it, nor instructions in next slot

3 Dynamic Super Scalar pipeline in operation Wait for Operands Check for RS Check for RAW EX TAC Mem Acces CDB #1 A1A1 A2A2 A3A3 A4A4 M1M1 M2M2.. M7M7 Divide Wait for Operands LD/ST FP Write Reg ISSUE/ Rename to RS Instr.Cache Wider Bus CDB #2 Wait for Operands Read Reg

4 Example 1 Loop:L.DF0,0(R1);F0=array element ADD.DF4,F0,F2 S.DF4,0(R1); store result ADDIUR1,R1,#-8 ;8 bytes (per DW) BNER1,R2,LOOP ;branch R1!=R2

5 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1First issue 1ADD.D F4,F0,F21 1S.D F4,0(R1) 1DADDIU R1,R1,#-8 1BNE R1,R2,Loop 2L.D F0,0(R1) 2ADD.D F4,F0,F2 2S.D F4,0(R1) 2DADDIU R1,R1,#-8 2BNE R1,R2,Loop 3L.D F0,0(R1) 3ADD.D F4,F0,F2 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

6 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)12First issue 1ADD.D F4,F0,F21 1S.D F4,0(R1)2 1DADDIU R1,R1,#-82 1BNE R1,R2,Loop 2L.D F0,0(R1) 2ADD.D F4,F0,F2 2S.D F4,0(R1) 2DADDIU R1,R1,#-8 2BNE R1,R2,Loop 3L.D F0,0(R1) 3ADD.D F4,F0,F2 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

7 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)123First issue 1ADD.D F4,F0,F21 1S.D F4,0(R1)23 1DADDIU R1,R1,#-82 1BNE R1,R2,Loop3 2L.D F0,0(R1) 2ADD.D F4,F0,F2 2S.D F4,0(R1) 2DADDIU R1,R1,#-8 2BNE R1,R2,Loop 3L.D F0,0(R1) 3ADD.D F4,F0,F2 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

8 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F21 1S.D F4,0(R1)23 1DADDIU R1,R1,#-824 1BNE R1,R2,Loop3 2L.D F0,0(R1)4 2ADD.D F4,F0,F24 2S.D F4,0(R1) 2DADDIU R1,R1,#-8 2BNE R1,R2,Loop 3L.D F0,0(R1) 3ADD.D F4,F0,F2 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

9 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215 1S.D F4,0(R1)23Wait for ADD.D 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop3 2L.D F0,0(R1)4 2ADD.D F4,F0,F24 2S.D F4,0(R1)5 2DADDIU R1,R1,#-85 2BNE R1,R2,Loop 3L.D F0,0(R1) 3ADD.D F4,F0,F2 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

10 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215,65,6Wait for L.D 1S.D F4,0(R1)23Wait for ADD.D 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)4 2ADD.D F4,F0,F24 2S.D F4,0(R1)5 2DADDIU R1,R1,#-85 2BNE R1,R2,Loop6 3L.D F0,0(R1) 3ADD.D F4,F0,F2 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

11 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215,6,7Wait for L.D 1S.D F4,0(R1)23Wait for ADD.D 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)47Wait for BNE 2ADD.D F4,F0,F24 2S.D F4,0(R1)5 2DADDIU R1,R1,#-85 2BNE R1,R2,Loop6 3L.D F0,0(R1)7 3ADD.D F4,F0,F27 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

12 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for L.D 1S.D F4,0(R1)23Wait for ADD.D 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)478Wait for BNE 2ADD.D F4,F0,F24Wait for L.D 2S.D F4,0(R1)58Wait for ADD.D 2DADDIU R1,R1,#-85Wait for ALU 2BNE R1,R2,Loop6Wait for DADDIU 3L.D F0,0(R1)7Wait for BNE 3ADD.D F4,F0,F27Wait for L.D 3S.D F4,0(R1)8 3DADDIU R1,R1,#-88 3BNE R1,R2,Loop

13 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for L.D 1S.D F4,0(R1)239 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)4789Wait for BNE 2ADD.D F4,F0,F24Wait for L.D 2S.D F4,0(R1)58Wait for ADD.D 2DADDIU R1,R1,#-859Wait for ALU 2BNE R1,R2,Loop6Wait for DADDIU 3L.D F0,0(R1)7Wait for BNE 3ADD.D F4,F0,F27Wait for L.D 3S.D F4,0(R1)8Wait for ADD.D 3DADDIU R1,R1,#-88Wait for ALU 3BNE R1,R2,Loop9

14 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for L.D 1S.D F4,0(R1)239 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)4789Wait for BNE 2ADD.D F4,F0,F2410Wait for L.D 2S.D F4,0(R1)58Wait for ADD.D 2DADDIU R1,R1,#-85910Wait for ALU 2BNE R1,R2,Loop6Wait for DADDIU 3L.D F0,0(R1)7Wait for BNE 3ADD.D F4,F0,F27Wait for L.D 3S.D F4,0(R1)8Wait for ADD.D 3DADDIU R1,R1,#-88Wait for ALU 3BNE R1,R2,Loop9Wait for DADDIU

15 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for L.D 1S.D F4,0(R1)239 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)4789Wait for BNE 2ADD.D F4,F0,F2410,11Wait for L.D 2S.D F4,0(R1)58Wait for ADD.D 2DADDIU R1,R1,#-85910Wait for ALU 2BNE R1,R2,Loop611Wait for DADDIU 3L.D F0,0(R1)7Wait for BNE 3ADD.D F4,F0,F27Wait for L.D 3S.D F4,0(R1)8Wait for ADD.D 3DADDIU R1,R1,#-88Wait for ALU 3BNE R1,R2,Loop9Wait for DADDIU

16 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for L.D 1S.D F4,0(R1)239 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)4789Wait for BNE 2ADD.D F4,F0,F2410,11,12Wait for L.D 2S.D F4,0(R1)58Wait for ADD.D 2DADDIU R1,R1,#-85910Wait for ALU 2BNE R1,R2,Loop611Wait for DADDIU 3L.D F0,0(R1)712Wait for BNE 3ADD.D F4,F0,F27Wait for L.D 3S.D F4,0(R1)8Wait for ADD.D 3DADDIU R1,R1,#-88Wait for ALU 3BNE R1,R2,Loop9Wait for DADDIU

17 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for L.D 1S.D F4,0(R1)239 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)4789Wait for BNE 2ADD.D F4,F0,F2410-1213Wait for L.D 2S.D F4,0(R1)58Wait for ADD.D 2DADDIU R1,R1,#-85910Wait for ALU 2BNE R1,R2,Loop611Wait for DADDIU 3L.D F0,0(R1)71213Wait for BNE 3ADD.D F4,F0,F27Wait for L.D 3S.D F4,0(R1)813Wait for ADD.D 3DADDIU R1,R1,#-88Wait for ALU 3BNE R1,R2,Loop9Wait for DADDIU

18 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for L.D 1S.D F4,0(R1)239 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)4789Wait for BNE 2ADD.D F4,F0,F2410-1213Wait for L.D 2S.D F4,0(R1)5814Wait for ADD.D 2DADDIU R1,R1,#-85910Wait for ALU 2BNE R1,R2,Loop611Wait for DADDIU 3L.D F0,0(R1)7121314Wait for BNE 3ADD.D F4,F0,F27Wait for L.D 3S.D F4,0(R1)813Wait for ADD.D 3DADDIU R1,R1,#-8814Wait for ALU 3BNE R1,R2,Loop9Wait for DADDIU

19 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for L.D 1S.D F4,0(R1)239 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)4789Wait for BNE 2ADD.D F4,F0,F2410-1213Wait for L.D 2S.D F4,0(R1)5814Wait for ADD.D 2DADDIU R1,R1,#-85910Wait for ALU 2BNE R1,R2,Loop611Wait for DADDIU 3L.D F0,0(R1)7121314Wait for BNE 3ADD.D F4,F0,F2715Wait for L.D 3S.D F4,0(R1)813Wait for ADD.D 3DADDIU R1,R1,#-881415Wait for ALU 3BNE R1,R2,Loop9Wait for DADDIU

20 Dual issue, 1 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for L.D 1S.D F4,0(R1)239 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)4789Wait for BNE 2ADD.D F4,F0,F2410-1213Wait for L.D 2S.D F4,0(R1)5814Wait for ADD.D 2DADDIU R1,R1,#-85910Wait for ALU 2BNE R1,R2,Loop611Wait for DADDIU 3L.D F0,0(R1)7121314Wait for BNE 3ADD.D F4,F0,F2715,16Wait for L.D 3S.D F4,0(R1)813Wait for ADD.D 3DADDIU R1,R1,#-881415Wait for ALU 3BNE R1,R2,Loop916Wait for DADDIU

21 Dual issue, 1 Integer Unit It.InstructionsIssuesExecutesMem acces s Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for L.D 1S.D F4,0(R1)239 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)4789Wait for BNE 2ADD.D F4,F0,F2410-1213Wait for L.D 2S.D F4,0(R1)5814Wait for ADD.D 2DADDIU R1,R1,#-85910Wait for ALU 2BNE R1,R2,Loop611Wait for DADDIU 3L.D F0,0(R1)7121314Wait for BNE 3ADD.D F4,F0,F2715,16,17Wait for L.D 3S.D F4,0(R1)813Wait for ADD.D 3DADDIU R1,R1,#-881415Wait for ALU 3BNE R1,R2,Loop916Wait for DADDIU

22 Dual issue, 1 Integer Unit It.InstructionsIssuesExecutesMemWrite CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for L.D 1S.D F4,0(R1)239 1DADDIU R1,R1,#-8245Wait for ALU 1BNE R1,R2,Loop36Wait for DADDIU 2L.D F0,0(R1)4789Wait for BNE 2ADD.D F4,F0,F2410-1213Wait for L.D 2S.D F4,0(R1)5814Wait for ADD.D 2DADDIU R1,R1,#-85910Wait for ALU 2BNE R1,R2,Loop611Wait for DADDIU 3L.D F0,0(R1)7121314Wait for BNE 3ADD.D F4,F0,F2715,1718Wait for L.D 3S.D F4,0(R1)81319Wait for ADD.D 3DADDIU R1,R1,#-881415Wait for ALU 3BNE R1,R2,Loop916Wait for DADDIU

23 Separate MEM and INT Wait for Operands Check for RS Check for RAW Wait for Operands EX TAC Mem Access CDB #1 EX A1A1 A2A2 A3A3 A4A4 M1M1 M2M2.. M7M7 Divide Wait for Operands Integer LD/ST FP Write Reg ISSUE/ Rename to RS Instr.Cache Wider Bus CDB #2 Wait for Operands Read Reg

24 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1First issue 1ADD.D F4,F0,F21 1S.D F4,0(R1) 1DADDIU R1,R1,#-8 1BNE R1,R2,Loop 2L.D F0,0(R1) 2ADD.D F4,F0,F2 2S.D F4,0(R1) 2DADDIU R1,R1,#-8 2BNE R1,R2,Loop 3L.D F0,0(R1) 3ADD.D F4,F0,F2 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

25 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)12First issue 1ADD.D F4,F0,F21 1S.D F4,0(R1)2 1DADDIU R1,R1,#-82 1BNE R1,R2,Loop 2L.D F0,0(R1) 2ADD.D F4,F0,F2 2S.D F4,0(R1) 2DADDIU R1,R1,#-8 2BNE R1,R2,Loop 3L.D F0,0(R1) 3ADD.D F4,F0,F2 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

26 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)123First issue 1ADD.D F4,F0,F21 1S.D F4,0(R1)23 1DADDIU R1,R1,#-823 1BNE R1,R2,Loop3 2L.D F0,0(R1) 2ADD.D F4,F0,F2 2S.D F4,0(R1) 2DADDIU R1,R1,#-8 2BNE R1,R2,Loop 3L.D F0,0(R1) 3ADD.D F4,F0,F2 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

27 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F21Wait for LD.D 1S.D F4,0(R1)23Wait for ADD.D 1DADDIU R1,R1,#-8234Executes earlier 1BNE R1,R2,Loop3 2L.D F0,0(R1)4 2ADD.D F4,F0,F24 2S.D F4,0(R1) 2DADDIU R1,R1,#-8 2BNE R1,R2,Loop 3L.D F0,0(R1) 3ADD.D F4,F0,F2 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

28 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215Wait for LD.D 1S.D F4,0(R1)23Wait for ADD.D 1DADDIU R1,R1,#-8234Executes earlier 1BNE R1,R2,Loop35Wait for ADDIU 2L.D F0,0(R1)4 2ADD.D F4,F0,F24 2S.D F4,0(R1)5 2DADDIU R1,R1,#-85 2BNE R1,R2,Loop 3L.D F0,0(R1) 3ADD.D F4,F0,F2 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

29 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215,6Wait for LD.D 1S.D F4,0(R1)23Wait for ADD.D 1DADDIU R1,R1,#-8234Executes earlier 1BNE R1,R2,Loop35Wait for ADDIU 2L.D F0,0(R1)46Wait for BNE 2ADD.D F4,F0,F24Wait for L.D 2S.D F4,0(R1)5Wait for ADD.D 2DADDIU R1,R1,#-856Executes earlier 2BNE R1,R2,Loop6 3L.D F0,0(R1) 3ADD.D F4,F0,F2 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

30 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215,6,7Wait for LD.D 1S.D F4,0(R1)23Wait for ADD.D 1DADDIU R1,R1,#-8234Executes earlier 1BNE R1,R2,Loop35Wait for ADDIU 2L.D F0,0(R1)467Wait for BNE 2ADD.D F4,F0,F24Wait for L.D 2S.D F4,0(R1)57Wait for ADD.D 2DADDIU R1,R1,#-8567Executes earlier 2BNE R1,R2,Loop6 3L.D F0,0(R1)7 3ADD.D F4,F0,F27 3S.D F4,0(R1) 3DADDIU R1,R1,#-8 3BNE R1,R2,Loop

31 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for LD.D 1S.D F4,0(R1)23Wait for ADD.D 1DADDIU R1,R1,#-8234Executes earlier 1BNE R1,R2,Loop35Wait for ADDIU 2L.D F0,0(R1)4678Wait for BNE 2ADD.D F4,F0,F24Wait for L.D 2S.D F4,0(R1)57Wait for ADD.D 2DADDIU R1,R1,#-8567Executes earlier 2BNE R1,R2,Loop68 3L.D F0,0(R1)7 3ADD.D F4,F0,F27 3S.D F4,0(R1)8 3DADDIU R1,R1,#-88 3BNE R1,R2,Loop

32 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for LD.D 1S.D F4,0(R1)239Wait for ADD.D 1DADDIU R1,R1,#-8234Executes earlier 1BNE R1,R2,Loop35Wait for ADDIU 2L.D F0,0(R1)4678Wait for BNE 2ADD.D F4,F0,F249Wait for L.D 2S.D F4,0(R1)57Wait for ADD.D 2DADDIU R1,R1,#-8567Executes earlier 2BNE R1,R2,Loop68Wait for ADDIU 3L.D F0,0(R1)79Wait for BNE 3ADD.D F4,F0,F27Wait for L.D 3S.D F4,0(R1)8 3DADDIU R1,R1,#-889 3BNE R1,R2,Loop9

33 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for LD.D 1S.D F4,0(R1)239Wait for ADD.D 1DADDIU R1,R1,#-8234Executes earlier 1BNE R1,R2,Loop35Wait for ADDIU 2L.D F0,0(R1)4678Wait for BNE 2ADD.D F4,F0,F249,10Wait for L.D 2S.D F4,0(R1)57Wait for ADD.D 2DADDIU R1,R1,#-8567Executes earlier 2BNE R1,R2,Loop68Wait for ADDIU 3L.D F0,0(R1)7910Wait for BNE 3ADD.D F4,F0,F27Wait for L.D 3S.D F4,0(R1)810Wait for ADD.D 3DADDIU R1,R1,#-88910Executes earlier 3BNE R1,R2,Loop9Wait for ADDIU

34 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for LD.D 1S.D F4,0(R1)239Wait for ADD.D 1DADDIU R1,R1,#-8234Executes earlier 1BNE R1,R2,Loop35Wait for ADDIU 2L.D F0,0(R1)4678Wait for BNE 2ADD.D F4,F0,F249,10,11Wait for L.D 2S.D F4,0(R1)57Wait for ADD.D 2DADDIU R1,R1,#-8567Executes earlier 2BNE R1,R2,Loop68Wait for ADDIU 3L.D F0,0(R1)791011Wait for BNE 3ADD.D F4,F0,F27Wait for L.D 3S.D F4,0(R1)810Wait for ADD.D 3DADDIU R1,R1,#-88910Executes earlier 3BNE R1,R2,Loop911Wait for ADDIU

35 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for LD.D 1S.D F4,0(R1)239Wait for ADD.D 1DADDIU R1,R1,#-8234Executes earlier 1BNE R1,R2,Loop35Wait for ADDIU 2L.D F0,0(R1)4678Wait for BNE 2ADD.D F4,F0,F249-1112Wait for L.D 2S.D F4,0(R1)57Wait for ADD.D 2DADDIU R1,R1,#-8567Executes earlier 2BNE R1,R2,Loop68Wait for ADDIU 3L.D F0,0(R1)791011Wait for BNE 3ADD.D F4,F0,F2712Wait for L.D 3S.D F4,0(R1)810Wait for ADD.D 3DADDIU R1,R1,#-88910Executes earlier 3BNE R1,R2,Loop911Wait for ADDIU

36 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for LD.D 1S.D F4,0(R1)239Wait for ADD.D 1DADDIU R1,R1,#-8234Executes earlier 1BNE R1,R2,Loop35Wait for ADDIU 2L.D F0,0(R1)4678Wait for BNE 2ADD.D F4,F0,F249-1112Wait for L.D 2S.D F4,0(R1)5713Wait for ADD.D 2DADDIU R1,R1,#-8567Executes earlier 2BNE R1,R2,Loop68Wait for ADDIU 3L.D F0,0(R1)791011Wait for BNE 3ADD.D F4,F0,F2712,13Wait for L.D 3S.D F4,0(R1)810Wait for ADD.D 3DADDIU R1,R1,#-88910Executes earlier 3BNE R1,R2,Loop911Wait for ADDIU

37 Dual issue, 2 Integer Unit IterationInstructionsIssuesExecutesMem access Write CDB Comment 1L.D F0,0(R1)1234First issue 1ADD.D F4,F0,F215-78Wait for LD.D 1S.D F4,0(R1)239Wait for ADD.D 1DADDIU R1,R1,#-8234Executes earlier 1BNE R1,R2,Loop35Wait for ADDIU 2L.D F0,0(R1)4678Wait for BNE 2ADD.D F4,F0,F249-1112Wait for L.D 2S.D F4,0(R1)5713Wait for ADD.D 2DADDIU R1,R1,#-8567Executes earlier 2BNE R1,R2,Loop68Wait for ADDIU 3L.D F0,0(R1)791011Wait for BNE 3ADD.D F4,F0,F2712-1415Wait for L.D 3S.D F4,0(R1)81016Wait for ADD.D 3DADDIU R1,R1,#-88910Executes earlier 3BNE R1,R2,Loop911Wait for ADDIU

38 Speculative Execution Need to overcome Branch Hazards Precise Exception

39 Speculative Pipeline ISSUE/ Rename to RS Check for RS Check for RAW CDB A1A1 A2A2 A3A3 A4A4 Wait for Operands FP Write Reg Wait for Operands EX TAC Mem Acces LD/ST Wait for Operands EX Integer M1M1 M2M2.. M7M7 Wait for Operands Divide Wait for Operands ROB Read Reg

40 The Hardware: Reorder Buffer If inst write results in program order, reg/memory always get the correct values Reorder buffer (ROB) – reorder out-of-order inst to program order at the time of writing reg/memory (commit) If some inst goes wrong, handle it at the time of commit – just flush inst afterwards Inst cannot write reg/memory immediately after execution, so ROB also buffer the results No such a place in Tomasulo original Reorder Buffer Decode FU1FU2 RS Fetch Unit Rename L-bufS-buf DM Regfile IM

41 Issue — get instruction from FP Op Queue Condition: a free RS at the required FU Actions: (1) decode the instruction; (2) allocate a RS and ROB entry; (3) do source register renaming; (4) do dest register renaming; (5) read register file; (6) dispatch the decoded and renamed instruction to the RS and ROB Execution — operate on operands (EX) Condition: At a given FU, At lease one instruction is ready Action: select a ready instruction and send it to the FU Write result — finish execution (WB) Condition: At a given FU, some instruction finishes FU execution Actions: (1) FU writes to CDB, broadcast to all RSs and to the ROB; (2) FU broadcast tag (ROB index) to all RS; (3) de- allocate the RS. Note: no register status update at this time Speculative Tomasulo Algorithm

42 Commit—update register with reorder result Condition: ROB is not empty and ROB head inst has finished execution Actions if no mis-prediction/exception: (1) write result to register/memory, (2) update register status, (3) de-allocate the ROB entry Actions if with mis-prediction/exception: flush the pipeline, e.g. (1) flush IFQ; (2) clear register status; (3) flush all RS and reset FU; (4) reset ROB

43 Example while (A(i) <> x) {A(i) ++; i++; } Loop: LDR2,0(R1) ; R1 = base address of A() DADDIUR2,R2,#1 SDR2,0(R1) ;store result DADDIUR1,R1,#4 ; BNER2,R3,LOOP ; x = R3

44 Non-Speculative execution: Dual issue, 2 CDB, 2 Int Units IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1First issue 1ADDIU R2,R2,#11 1SD R2,0(R1) 1DADDIU R1,R1,#4 1BNE R2,R3,Loop 2LD R3,0(R1) 2ADDIU R2,R2,#1 2SD R2,0(R1) 2DADDIU R1,R1,#4 2BNE R2,R3,Loop 3LD R2,0(R1) 3ADDIU R2,R2,#1 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

45 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)12First issue 1ADDIU R2,R2,#11Wait for LW 1SD R2,0(R1)2 1DADDIU R1,R1,#42 1BNE R2,R3,Loop 2LD R3,0(R1) 2ADDIU R2,R2,#1 2SD R2,0(R1) 2DADDIU R1,R1,#4 2BNE R2,R3,Loop 3LD R2,0(R1) 3ADDIU R2,R2,#1 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

46 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)123First issue 1ADDIU R2,R2,#11Wait for LW 1SD R2,0(R1)23Wait for ADDIU 1DADDIU R1,R1,#423 1BNE R2,R3,Loop3 2LD R3,0(R1) 2ADDIU R2,R2,#1 2SD R2,0(R1) 2DADDIU R1,R1,#4 2BNE R2,R3,Loop 3LD R2,0(R1) 3ADDIU R2,R2,#1 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

47 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#11Wait for LW 1SD R2,0(R1)23Wait for ADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop3 2LD R3,0(R1)4 2ADDIU R2,R2,#14 2SD R2,0(R1) 2DADDIU R1,R1,#4 2BNE R2,R3,Loop 3LD R2,0(R1) 3ADDIU R2,R2,#1 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

48 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#115Wait for LW 1SD R2,0(R1)23Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop3Wait for DADDIU 2LD R3,0(R1)4Wait for BNE 2ADDIU R2,R2,#14Wait for LW 2SD R2,0(R1)5 2DADDIU R1,R1,#45 2BNE R2,R3,Loop 3LD R2,0(R1) 3ADDIU R2,R2,#1 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

49 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for LW 1SD R2,0(R1)23Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop3Wait for DADDIU 2LD R3,0(R1)4Wait for BNE 2ADDIU R2,R2,#14Wait for LW 2SD R2,0(R1)5Wait for DADDIU 2DADDIU R1,R1,#45Wait for BNE 2BNE R2,R3,Loop6 3LD R2,0(R1) 3ADDIU R2,R2,#1 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

50 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for LW 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop3 7 Wait for DADDIU 2LD R3,0(R1)4Wait for BNE 2ADDIU R2,R2,#14Wait for LW 2SD R2,0(R1)5Wait for DADDIU 2DADDIU R1,R1,#45Wait for BNE 2BNE R2,R3,Loop6Wait for DADDIU 3LD R2,0(R1)7 3ADDIU R2,R2,#17 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

51 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for BNE 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop37Wait for DADDIU 2LD R3,0(R1)48Wait for BNE 2ADDIU R2,R2,#14Wait for LW 2SD R2,0(R1)5Wait for DADDIU 2DADDIU R1,R1,#458Wait for BNE 2BNE R2,R3,Loop6Wait for DADDIU 3LD R2,0(R1)7Wait for BNE 3ADDIU R2,R2,#17Wait for LW 3SD R2,0(R1)8 3DADDIU R1,R1,#48 3BNE R2,R3,Loop

52 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for BNE 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop37Wait for DADDIU 2LD R3,0(R1)489Wait for BNE 2ADDIU R2,R2,#14Wait for LW 2SD R2,0(R1)59Wait for DADDIU 2DADDIU R1,R1,#4589Wait for BNE 2BNE R2,R3,Loop6Wait for DADDIU 3LD R2,0(R1)7Wait for BNE 3ADDIU R2,R2,#17Wait for LW 3SD R2,0(R1)8Wait for DADDIU 3DADDIU R1,R1,#48Wait for BNE 3BNE R2,R3,Loop9

53 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for BNE 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop37Wait for DADDIU 2LD R3,0(R1)48910Wait for BNE 2ADDIU R2,R2,#14Wait for LW 2SD R2,0(R1)59Wait for DADDIU 2DADDIU R1,R1,#4589Wait for BNE 2BNE R2,R3,Loop6Wait for DADDIU 3LD R2,0(R1)7Wait for BNE 3ADDIU R2,R2,#17Wait for LW 3SD R2,0(R1)8Wait for DADDIU 3DADDIU R1,R1,#48Wait for BNE 3BNE R2,R3,Loop9Wait for DADDIU

54 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for BNE 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop37Wait for DADDIU 2LD R3,0(R1)48910Wait for BNE 2ADDIU R2,R2,#1411Wait for LW 2SD R2,0(R1)59Wait for DADDIU 2DADDIU R1,R1,#4589Wait for BNE 2BNE R2,R3,Loop6Wait for DADDIU 3LD R2,0(R1)7Wait for BNE 3ADDIU R2,R2,#17Wait for LW 3SD R2,0(R1)8Wait for DADDIU 3DADDIU R1,R1,#48Wait for BNE 3BNE R2,R3,Loop9Wait for DADDIU

55 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for BNE 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop37Wait for DADDIU 2LD R3,0(R1)48910Wait for BNE 2ADDIU R2,R2,#141112Wait for LW 2SD R2,0(R1)59Wait for DADDIU 2DADDIU R1,R1,#4589Wait for BNE 2BNE R2,R3,Loop6Wait for DADDIU 3LD R2,0(R1)7Wait for BNE 3ADDIU R2,R2,#17Wait for LW 3SD R2,0(R1)8Wait for DADDIU 3DADDIU R1,R1,#48Wait for BNE 3BNE R2,R3,Loop9Wait for DADDIU

56 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for BNE 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop37Wait for DADDIU 2LD R3,0(R1)48910Wait for BNE 2ADDIU R2,R2,#141112Wait for LW 2SD R2,0(R1)5913Wait for DADDIU 2DADDIU R1,R1,#4589Wait for BNE 2BNE R2,R3,Loop613Wait for DADDIU 3LD R2,0(R1)7Wait for BNE 3ADDIU R2,R2,#17Wait for LW 3SD R2,0(R1)8Wait for DADDIU 3DADDIU R1,R1,#48Wait for BNE 3BNE R2,R3,Loop9Wait for DADDIU

57 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for BNE 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop37Wait for DADDIU 2LD R3,0(R1)48910Wait for BNE 2ADDIU R2,R2,#141112Wait for LW 2SD R2,0(R1)5913Wait for DADDIU 2DADDIU R1,R1,#4589Wait for BNE 2BNE R2,R3,Loop613Wait for DADDIU 3LD R2,0(R1)714Wait for BNE 3ADDIU R2,R2,#17Wait for LW 3SD R2,0(R1)8Wait for DADDIU 3DADDIU R1,R1,#4814Wait for BNE 3BNE R2,R3,Loop9Wait for DADDIU

58 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for BNE 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop37Wait for DADDIU 2LD R3,0(R1)48910Wait for BNE 2ADDIU R2,R2,#141112Wait for LW 2SD R2,0(R1)5913Wait for DADDIU 2DADDIU R1,R1,#4589Wait for BNE 2BNE R2,R3,Loop613Wait for DADDIU 3LD R2,0(R1)71415Wait for BNE 3ADDIU R2,R2,#17Wait for LW 3SD R2,0(R1)815Wait for DADDIU 3DADDIU R1,R1,#481415Wait for BNE 3BNE R2,R3,Loop9Wait for DADDIU

59 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for BNE 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop37Wait for DADDIU 2LD R3,0(R1)48910Wait for BNE 2ADDIU R2,R2,#141112Wait for LW 2SD R2,0(R1)5913Wait for DADDIU 2DADDIU R1,R1,#4589Wait for BNE 2BNE R2,R3,Loop613Wait for DADDIU 3LD R2,0(R1)7141516Wait for BNE 3ADDIU R2,R2,#17Wait for LW 3SD R2,0(R1)815Wait for DADDIU 3DADDIU R1,R1,#481415Wait for BNE 3BNE R2,R3,Loop9Wait for DADDIU

60 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for BNE 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop37Wait for DADDIU 2LD R3,0(R1)48910Wait for BNE 2ADDIU R2,R2,#141112Wait for LW 2SD R2,0(R1)5913Wait for DADDIU 2DADDIU R1,R1,#4589Wait for BNE 2BNE R2,R3,Loop613Wait for DADDIU 3LD R2,0(R1)7141516Wait for BNE 3ADDIU R2,R2,#1717Wait for LW 3SD R2,0(R1)815Wait for DADDIU 3DADDIU R1,R1,#481415Wait for BNE 3BNE R2,R3,Loop9Wait for DADDIU

61 Non-Speculative execution: Dual issue, 2 CDB IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for BNE 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop37Wait for DADDIU 2LD R3,0(R1)48910Wait for BNE 2ADDIU R2,R2,#141112Wait for LW 2SD R2,0(R1)5913Wait for DADDIU 2DADDIU R1,R1,#4589Wait for BNE 2BNE R2,R3,Loop613Wait for DADDIU 3LD R2,0(R1)7141516Wait for BNE 3ADDIU R2,R2,#171718Wait for LW 3SD R2,0(R1)815Wait for DADDIU 3DADDIU R1,R1,#481415Wait for BNE 3BNE R2,R3,Loop9Wait for DADDIU

62 Non-Speculative execution: Dual issue, 2 CDB (Gap b/w Issue and Execute) IterationInstructionsIssuesExecutesMem access Write CDB Comment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#1156Wait for BNE 1SD R2,0(R1)237Wait for DADDIU 1DADDIU R1,R1,#4234Execute directly 1BNE R2,R3,Loop37Wait for DADDIU 2LD R3,0(R1)48910Wait for BNE 2ADDIU R2,R2,#141112Wait for LW 2SD R2,0(R1)5913Wait for DADDIU 2DADDIU R1,R1,#4589Wait for BNE 2BNE R2,R3,Loop613Wait for DADDIU 3LD R2,0(R1)7141516Wait for BNE 3ADDIU R2,R2,#171718Wait for LW 3SD R2,0(R1)81519Wait for DADDIU 3DADDIU R1,R1,#481415Wait for BNE 3BNE R2,R3,Loop919Wait for DADDIU

63 Speculative execution: Dual issue, 2 CDB

64 It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)1First issue 1ADDIU R2,R2,#11 1SD R2,0(R1) 1DADDIU R1,R1,#4 1BNE R2,R3,Loop 2LD R3,0(R1) 2ADDIU R2,R2,#1 2SD R2,0(R1) 2DADDIU R1,R1,#4 2BNE R2,R3,Loop 3LD R2,0(R1) 3ADDIU R2,R2,#1 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

65 Speculative execution: Dual issue, 2 CDB It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)12First issue 1ADDIU R2,R2,#11 1SD R2,0(R1)2 1DADDIU R1,R1,#42 1BNE R2,R3,Loop 2LD R3,0(R1) 2ADDIU R2,R2,#1 2SD R2,0(R1) 2DADDIU R1,R1,#4 2BNE R2,R3,Loop 3LD R2,0(R1) 3ADDIU R2,R2,#1 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

66 Speculative execution: Dual issue, 2 CDB It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)123First issue 1ADDIU R2,R2,#11LUD 1SD R2,0(R1)23Wait for R2 1DADDIU R1,R1,#423 1BNE R2,R3,Loop3 2LD R3,0(R1) 2ADDIU R2,R2,#1 2SD R2,0(R1) 2DADDIU R1,R1,#4 2BNE R2,R3,Loop 3LD R2,0(R1) 3ADDIU R2,R2,#1 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

67 Speculative execution: Dual issue, 2 CDB It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)1234First issue 1ADDIU R2,R2,#11LUD 1SD R2,0(R1)23Wait for R2 1DADDIU R1,R1,#4234 1BNE R2,R3,Loop3 2LD R3,0(R1)4 2ADDIU R2,R2,#14 2SD R2,0(R1) 2DADDIU R1,R1,#4 2BNE R2,R3,Loop 3LD R2,0(R1) 3ADDIU R2,R2,#1 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

68 Speculative execution: Dual issue, 2 CDB It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)12345First issue 1ADDIU R2,R2,#115LUD 1SD R2,0(R1)23Wait for R2 1DADDIU R1,R1,#4234 1BNE R2,R3,Loop3 2LD R3,0(R1)45Speculative 2ADDIU R2,R2,#14 2SD R2,0(R1)5 2DADDIU R1,R1,#45 2BNE R2,R3,Loop 3LD R2,0(R1) 3ADDIU R2,R2,#1 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

69 Speculative execution: Dual issue, 2 CDB It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)12345First issue 1ADDIU R2,R2,#1156LUD 1SD R2,0(R1)23Wait for R2 1DADDIU R1,R1,#4234 1BNE R2,R3,Loop3 2LD R3,0(R1)456Speculative 2ADDIU R2,R2,#14LUD 2SD R2,0(R1)56Speculative 2DADDIU R1,R1,#456Speculative 2BNE R2,R3,Loop6 3LD R2,0(R1) 3ADDIU R2,R2,#1 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

70 Speculative execution: Dual issue, 2 CDB It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)12345First issue 1ADDIU R2,R2,#11567LUD 1SD R2,0(R1)237Wait for R2 1DADDIU R1,R1,#4234 1BNE R2,R3,Loop37R2 Avail. 2LD R3,0(R1)4567Speculative 2ADDIU R2,R2,#14LUD 2SD R2,0(R1)56Speculative 2DADDIU R1,R1,#4567Speculative 2BNE R2,R3,Loop6 3LD R2,0(R1)7 3ADDIU R2,R2,#17 3SD R2,0(R1) 3DADDIU R1,R1,#4 3BNE R2,R3,Loop

71 Speculative execution: Dual issue, 2 CDB It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)12345First issue 1ADDIU R2,R2,#11567LUD 1SD R2,0(R1)237Wait for R2 1DADDIU R1,R1,#42348 1BNE R2,R3,Loop378R2 Avail. 2LD R3,0(R1)4567Speculative 2ADDIU R2,R2,#148LUD 2SD R2,0(R1)56Speculative 2DADDIU R1,R1,#4567Speculative 2BNE R2,R3,Loop6 3LD R2,0(R1)78Speculative 3ADDIU R2,R2,#17 3SD R2,0(R1)8 3DADDIU R1,R1,#48 3BNE R2,R3,Loop

72 Speculative execution: Dual issue, 2 CDB It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)12345First issue 1ADDIU R2,R2,#11567LUD 1SD R2,0(R1)237Wait for R2 1DADDIU R1,R1,#42348 1BNE R2,R3,Loop378R2 Avail. 2LD R3,0(R1)45679 2ADDIU R2,R2,#1489 2SD R2,0(R1)56 2DADDIU R1,R1,#4567 2BNE R2,R3,Loop6 3LD R2,0(R1)789Speculative 3ADDIU R2,R2,#17 3SD R2,0(R1)89 3DADDIU R1,R1,#489 3BNE R2,R3,Loop9

73 Speculative execution: Dual issue, 2 CDB It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)12345First issue 1ADDIU R2,R2,#11567LUD 1SD R2,0(R1)237Wait for R2 1DADDIU R1,R1,#42348 1BNE R2,R3,Loop378R2 Avail. 2LD R3,0(R1)45679 2ADDIU R2,R2,#148910 2SD R2,0(R1)5610 2DADDIU R1,R1,#4567 2BNE R2,R3,Loop610 3LD R2,0(R1)78910Speculative 3ADDIU R2,R2,#17 3SD R2,0(R1)89 3DADDIU R1,R1,#48910 3BNE R2,R3,Loop9

74 Speculative execution: Dual issue, 2 CDB It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)12345First issue 1ADDIU R2,R2,#11567LUD 1SD R2,0(R1)237Wait for R2 1DADDIU R1,R1,#42348 1BNE R2,R3,Loop378R2 Avail. 2LD R3,0(R1)45679 2ADDIU R2,R2,#148910 2SD R2,0(R1)5610 2DADDIU R1,R1,#456711 2BNE R2,R3,Loop61011 3LD R2,0(R1)78910Speculative 3ADDIU R2,R2,#1711 3SD R2,0(R1)89 3DADDIU R1,R1,#48910 3BNE R2,R3,Loop9

75 Speculative execution: Dual issue, 2 CDB It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)12345First issue 1ADDIU R2,R2,#11567LUD 1SD R2,0(R1)237Wait for R2 1DADDIU R1,R1,#42348 1BNE R2,R3,Loop378R2 Avail. 2LD R3,0(R1)45679 2ADDIU R2,R2,#148910 2SD R2,0(R1)5610 2DADDIU R1,R1,#456711 2BNE R2,R3,Loop61011 3LD R2,0(R1)7891012Speculative 3ADDIU R2,R2,#171112 3SD R2,0(R1)89 3DADDIU R1,R1,#48910 3BNE R2,R3,Loop9

76 Speculative execution: Dual issue, 2 CDB It.InstructionsIssEXEMEMCDBCommitComment 1LD R2,0(R1)12345First issue 1ADDIU R2,R2,#11567LUD 1SD R2,0(R1)237Wait for R2 1DADDIU R1,R1,#42348 1BNE R2,R3,Loop378R2 Avail. 2LD R3,0(R1)45679 2ADDIU R2,R2,#148910 2SD R2,0(R1)5610 2DADDIU R1,R1,#456711 2BNE R2,R3,Loop61011 3LD R2,0(R1)7891012 3ADDIU R2,R2,#17111213 3SD R2,0(R1)8913 3DADDIU R1,R1,#48910 3BNE R2,R3,Loop913

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