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Published byJoshua Johnson Modified over 11 years ago
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Exemple dexécution dun programme IADD Jeux dinstructions de la machine Traduction en hexa 0x60
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État Initial 3 0x00 0x60 0x05 0x00 0x04 Addr Alu JM 4 to 16 Decoder High Bit C B MPC 4 9 8 2 2 6 8 B Bus C Bus Memory control signals (rd,wr,fetch) N Z MIR JMPC JAMN/JAMZ
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Exemple chargement dune instruction 3 0x00 0x60 0x05 0x00 0x04 Addr Alu JM 4 to 16 Decoder High Bit C B MPC 4 9 8 2 2 6 8 B Bus C Bus Memory control signals (rd,wr,fetch) N Z MIR JMPC JAMN/JAMZ
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Exemple IADD (MAR=SP=SP-1; Rd ; Goto iadd2) 3 0x01 0x60 0x05 0x00 0x04 Addr Alu JM 4 to 16 Decoder High Bit C B MPC 4 9 8 2 2 6 8 B Bus C Bus Memory control signals (rd,wr,fetch) N Z MIR JMPC JAMN/JAMZ
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Exemple IADD (H=TOS ; Goto iadd3) 3 0x04 0x01 0xXX 0x04 0x00 0x04 Addr Alu JM 4 to 16 Decoder High Bit C B MPC 4 9 8 2 2 6 8 B Bus C Bus Memory control signals (rd,wr,fetch) N Z MIR JMPC JAMN/JAMZ Arrivée de la valeur de la prochaine instruction
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Exemple IADD (MDR=TOS=MDR+H ;Wr ;Goto Main1) 3 0x04 0x09 0x01 0xXX 0x04 0x00 0x04 Addr Alu JM 4 to 16 Decoder High Bit C B MPC 4 9 8 2 2 6 8 B Bus C Bus Memory control signals (rd,wr,fetch) N Z MIR JMPC JAMN/JAMZ Arrivée de la valeur de ladresse mémoire 0x04
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Résultat 3 0x04 0x0D 0x01 0xXX 0x04 0x00 0x0D 0x04 Addr Alu JM 4 to 16 Decoder High Bit C B MPC 4 9 8 2 2 6 8 B Bus C Bus Memory control signals (rd,wr,fetch) N Z MIR JMPC JAMN/JAMZ
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