1. DIFFERENTIAL POLARIZATION DELAY LINE controller Supervisor : Mony Orbach Performed by: Maria Terushkin Guy Ovadia Technion – Israel Institute of Technology Department of Electrical Engineering High Speed Digital Systems Lab

2. Introduction – the DDL A device in the EO Lab, used to introduce accurate optical delays in a system Working principle: Split the light into orthogonal polarizations Vary the optical length traveled by one of the polarizations Recombine the two polarizations The result is a very accurate optical time delay

3. Introduction – cont. The electro-mechanical parts of the DDL are: The electro-mechanical parts of the DDL are: A DC motor A DC motor A linear travel stage connected to the motor A linear travel stage connected to the motor A shaft encoder to measure movement A shaft encoder to measure movement Limit switches Limit switches The DDL is supplied without a controller. It is currently being run manually  The DDL is supplied without a controller. It is currently being run manually  The Project’s goal is to build a closed-loop controller for the DDL The Project’s goal is to build a closed-loop controller for the DDL

4. Project Requirements Building and programming a controller for the introduced DDL: Building and programming a controller for the introduced DDL: Closed-loop control of the motor Closed-loop control of the motor PC interface through a USB connection PC interface through a USB connection Functions required: Functions required: Go to “xxx” position Go to “xxx” position Set current position as “0” Set current position as “0” Read current position Read current position

5. Project Requirements – cont. Specifications required: Specifications required: Resolution will be as high as the DDL allows (a single encoder step = 0.5 micron). Resolution will be as high as the DDL allows (a single encoder step = 0.5 micron). No cumulative positional error is allowed. No cumulative positional error is allowed. Velocity of stage movement will be controlled, and kept within the specs of the DDL. Velocity of stage movement will be controlled, and kept within the specs of the DDL. Self-contained solution – with no need for external equipment. Self-contained solution – with no need for external equipment.

6. Block diagram DDL controller PC + simple UI USB Communication Unit Laboratory measurement equipment Fiber optics

7. DDL – controller diagram Limit Switches DC motor Encoder H-bridge Power supply 12MHz clk FPGA DDL

8. H-bridge switch Direction of spinning : to power the motor we turn on two switches that are diagonally opposed Motor goes clockwise Motor goes counter-clockwise

9. Reversible DC motor + encoder Encoders operate on the principle of the photo-electrical scanning of very fine gratings. Direction

10. DLP-USB245M The above mentioned The above mentioned USB Communication Unit. Send / Receive Data over USB at up to 1 M Bytes / sec 384 byte FIFO Transmit buffer / 128 byte FIFO receive buffer for high data throughput Integrated 3.3v Regulator – No External Regulator Required Integrated Power-On-Reset circuit 4.4v - 5.25v Single Supply taken directly from the USB port

11. MMC Platform The project is based on a platform previously designed in the HS-DSL. The project is based on a platform previously designed in the HS-DSL. The platform we will use is the Momentum Measurement Card created by Hadas Preminger & Uri Niv. The platform we will use is the Momentum Measurement Card created by Hadas Preminger & Uri Niv.

12. MMC Platform The MMC platform contains: The MMC platform contains: Altera Cyclone FPGA Altera Cyclone FPGA USB communication module USB communication module Power supplies Power supplies Several buffered I/O ports Several buffered I/O ports A convenient enclosure A convenient enclosure Cyclon e FPGA Transceiv ers DLPDLP CLK PCB EPC S Res et Sensor s PCPC D- 9 D- 15 Jack Socket s D- 9

13. Cyclone FPGA Altera’s low cost, simple FPGA 2910 Logic Elements, ~60,000 kBit RAM, clock PLL, >100 I/O pins, JTAG support Suitable for implementing glue logic, MCU function, signal processing and more

14. PID controller Stands for : Proportional Integral Derivative Stands for : Proportional Integral Derivative These terms describe three basic mathematical functions applied to the error signal, Verror = Vset - Vsensor These terms describe three basic mathematical functions applied to the error signal, Verror = Vset - Vsensor Kp*Verr Typically the main drive in a control loop, KP reduces a large part of the overall error. Kp*Verr Typically the main drive in a control loop, KP reduces a large part of the overall error. Ki * ∫ Verr dt Reduces the final error in a system. Summing even a small error over time produces a drive signal large enough to move the system toward a smaller error. Ki * ∫ Verr dt Reduces the final error in a system. Summing even a small error over time produces a drive signal large enough to move the system toward a smaller error. Kd*dVerr / dt Counteracts the KP and KI terms when the output changes quickly. This helps reduce overshoot and ringing. It has no effect on final error. Kd*dVerr / dt Counteracts the KP and KI terms when the output changes quickly. This helps reduce overshoot and ringing. It has no effect on final error.

15. Yet some more about PID controller Effects of changes in parameters: Effects of changes in parameters: Parameter Rise Time Overshoot Settling Time S.S.Error Parameter Rise Time Overshoot Settling Time S.S.Error P Decrease Increase Small Change Decrease P Decrease Increase Small Change Decrease I Decrease Increase Increase Eliminate I Decrease Increase Increase Eliminate D Small Change Decrease Decrease Small Change D Small Change Decrease Decrease Small Change Vset Vsensor PIDPID sensor plant amp Vout + - +

16. Milestones Choosing the components – in progress Choosing the components – in progress Building a test system – 1 week Building a test system – 1 week Programming the MMC – 2 weeks Programming the MMC – 2 weeks Designing a test bench – 2 weeks Designing a test bench – 2 weeks Adjusting the controller to the real system – 1 week Adjusting the controller to the real system – 1 week Creating a simple UI – 1 week Creating a simple UI – 1 week Integration with the setup at the EO lab – 1 week Integration with the setup at the EO lab – 1 week 07.02.2006 – end of semester (degree) 07.02.2006 – end of semester (degree)