1. 1 Digital Logic http://www.pds.ewi.tudelft.nl/~iosup/Courses/2011_ti1400_1.ppt

2. Outline 1.Basics of Boolean algebra and digital implementation 2.Sum of products form and digital implementation 3.Functional Units 4.Repeated Operations 5.Other Building Blocks

3. TU-Delft TI1400/11-PDS 3 Unit of Information Computers consist of digital (binary) circuits Unit of information: bit (Binary digIT), e.g. 0 and 1 There are two interpretations of 0 and 1: as data values as truth values ( true and false )

4. TU-Delft TI1400/11-PDS 4 Bit Strings By grouping bits together we obtain bit strings e.g which can be given a specific meaning For instance, we can represent non-negative numbers by bitstrings:

5. TU-Delft TI1400/11-PDS 5 Boolean Logic We want a computer that can calculate, i.e transform strings into other strings: 1 +2 = 3   = To calculate we need an algebra being able to use only two values George Boole (1854) showed that logic (or symbolic reasoning) can be reduced to a simple algebraic system

6. TU-Delft TI1400/11-PDS 6 Boolean algebra Rules are the same as school algebra: There is, however, one exception: ! Commutative Law Distributive Law Associative Law

7. TU-Delft TI1400/11-PDS 7 Boolean algebra To see this we have to find out what the operations “+” and “.” mean in logic First the “.” operation: x.y (or x  y ) Suppose x means “black” and y means “cows”. Then, x.y means “black cows” Hence “.” implies the class of objects that has both properties. Also called AND function.

8. TU-Delft TI1400/11-PDS 8 Boolean algebra The “+” operation merges independent objects: x + y (or x  y) Hence, if x means “man” and y means “woman” Then x+y means “man or woman” Also called OR function

9. TU-Delft TI1400/11-PDS 9 Boolean algebra Now suppose both objects are identical, for example x means “cows” Then x.x comprises no additional information Hence

10. TU-Delft TI1400/11-PDS 10 Boolean algebra Next, we select “0” and “1” as the symbols in the algebra This choice is not arbitrary, since these are the only number symbols for which holds x 2 = x What do these symbols mean in logic? “0” : Nothing “1” : Universe So 0.y = 0 and 1.y = y

11. TU-Delft TI1400/11-PDS 11 Boolean algebra Also, if x is a class of objects, then 1-x is the complement of that class It holds that x(1-x) = x -x 2 = x-x =0 Hence, a class and its complement have nothing in common x We denote 1-x as x

12. TU-Delft TI1400/11-PDS 12 Boolean algebra A nice property of this system that we write any function f(x) as We can show this by observing that virtually every mathematical function can be written in polynomial form, i.e

13. TU-Delft TI1400/11-PDS 13 Boolean algebra Now Hence, Let b = a 0 and a = a 0 + a 1 Then we have From this it follows that

14. TU-Delft TI1400/11-PDS 14 Boolean algebra So More dimensional functions can be derived in an identical way:

15. TU-Delft TI1400/11-PDS 15 Binary addition We apply this on the modulo-2 addition

16. TU-Delft TI1400/11-PDS 16 Binary multiplication Same for modulo-2 multiplication

17. TU-Delft TI1400/11-PDS 17 Functions Let X denote bitstring, e.g., Any polynomial function Y=f(X) can be constructed using Boolean logic Also holds for functions with more arguments Functions can be put in table form or in formula form

18. TU-Delft TI1400/11-PDS 18 Gates We use basic components to represent primary logic operations (called gates) Components are made from transistors x y OR x+y x y x.y x x AND INVERT

19. TU-Delft TI1400/11-PDS 19 Networks of gates We can make networks of gates x y EXOR

20. TU-Delft TI1400/11-PDS Outline 1.Basics of Boolean algebra and digital implementation 2.Sum of products form and digital implementation 3.Functional Units 4.Repeated Operations 5.Other Building Blocks

21. TU-Delft TI1400/11-PDS 21 Sum of product form x y f simplify

22. TU-Delft TI1400/11-PDS 22 Minimization of expressions Logic expressions can often be minimized Saves components Example:

23. TU-Delft TI1400/11-PDS 23 Karnaugh maps (1) Alternative geometrical method x y v w

24. TU-Delft TI1400/11-PDS 24 Karnaugh maps (2) w v y x Different drawing

25. TU-Delft TI1400/11-PDS 25 Don’t Cares Some outputs are indifferent Can be used for minimization

26. TU-Delft TI1400/11-PDS 26 NAND and NOR gates NAND and NOR gates are universal They are easy to realize de Morgan’s Laws

27. TU-Delft TI1400/11-PDS Outline 1.Basics of Boolean algebra and digital implementation 2.Sum of products form and digital implementation 3.Functional Units 4.Repeated Operations 5.Other Building Blocks

28. TU-Delft TI1400/11-PDS 28 Delay Every network of gates has delays input output transition time propagation delay 1 0 1 0 time

29. TU-Delft TI1400/11-PDS 29 Packaging Vcc Gnd

30. TU-Delft TI1400/11-PDS 30 Making functions time A,B Y  delay A B Y ADD nand gates

31. TU-Delft TI1400/11-PDS 31 Functional Units It would be very uneconomical to construct separate combinatorial circuits for every function needed Hence, functional units are parameterized A specific function is activated by a special control string F

32. TU-Delft TI1400/11-PDS 32 Arithmetic and Logic Unit A B Y F F F A B Y F

33. TU-Delft TI1400/11-PDS Outline 1.Basics of Boolean algebra and digital implementation 2.Sum of products form and digital implementation 3.Functional Units 4.Repeated Operations 5.Other Building Blocks

34. TU-Delft TI1400/11-PDS 34 Repeated operations Y : = Y + B i, i=1..n Repeated addition requires feedback Cannot be done without intermediate storage of results B Y F F

35. TU-Delft TI1400/11-PDS 35 Registers B Y F F = storage element

36. TU-Delft TI1400/11-PDS 36 SR flip flop Storage elements are not transient and are able to hold a logic value for a certain period of time R S Qa Qb

37. TU-Delft TI1400/11-PDS 37 Clocks In many circuits it is very convenient to have the state changed only at regular points in time This makes design of systems with memory elements easier Also, reasoning about the behavior of the system is easier This is done by a clock signal clock period

38. TU-Delft TI1400/11-PDS 38 D flip flop D flip flop samples at clock is high and stores if clock is low QnQn QnQn C D DQ n+101

39. TU-Delft TI1400/11-PDS 39 Edge triggered flip flops In reality most systems are built such that the state only changes at rising edge of the clock pulse We also need a control signal to enable a change state change

40. TU-Delft TI1400/11-PDS 40 Basic storage element O C I R/W time C D Q C I O R/W enables a state change

41. TU-Delft TI1400/11-PDS Outline 1.Basics of Boolean algebra and digital implementation 2.Sum of products form and digital implementation 3.Functional Units 4.Repeated Operations 5.Other Building Blocks

42. TU-Delft TI1400/11-PDS 42 4-bit register C R/W C D Q I O C D Q I O C D Q I O C D Q I O

43. TU-Delft TI1400/11-PDS 43 Some basic circuits Y MPLEX m AB Y = A if m=1 Y = B if m=0 Y Decoder A Only output y A = 1, rest is 0

44. TU-Delft TI1400/11-PDS 44 Decoder Y A Only output y A = 1, rest is 0 a2 a1 0 1 2 3 a1 a2#y 0 00 0 11 1 02 1 13

45. TU-Delft TI1400/11-PDS 45 Multiplexer Y MPLEX m AB Y = A if m=1 Y = B if m=0 y m a b

46. TU-Delft TI1400/11-PDS End of Lecture Comments? Questions?

47. TU-Delft TI1400/11-PDS 47 Memory REG1 REG2 REG3 REG4 mplex decoder Address Din Dout R/W

48. TU-Delft TI1400/11-PDS 48 Counter MPLEX INC 0001 R/W preset output REG

49. TU-Delft TI1400/11-PDS 49 Sequential circuits The counter example shows that systems have state The state of such systems depend on the current inputs and the sequence of previous inputs The state of a system is the union of the values of the memory elements of that system

50. TU-Delft TI1400/11-PDS 50 State diagrams We call the change from one state to another a state transition Can be represented as a state diagram S0 S1 S2 code

51. TU-Delft TI1400/11-PDS 51 Conditional Change S0 S1 S2 x=0 x=1

52. TU-Delft TI1400/11-PDS 52 Coding of State

53. TU-Delft TI1400/11-PDS 53 Put in Karnaugh map 00d1 10d1 x y z 10d0 00d0 x y z Y Z

54. TU-Delft TI1400/11-PDS 54 Scheme DQ DQ x Y Z z y

55. TU-Delft TI1400/11-PDS 55 General scheme Combinatorial Logic Delay elements Inputs Outputs

56. TU-Delft TI1400/11-PDS 56 Procedure FST 1.Make State Diagram 2.Make State Table 3.Give States binary code 4.Put state update functions in Karnaugh Map 5.Make combinatorial circuit to realize functions