1. © 2004, D. J. Foreman 1 Computer Organization

2. © 2004, D. J. Foreman 2 Basic Architecture Review  Von Neumann ■ Distinct single-ALU & single-Control ■ Fixed circuitry  Non-von Neumann ■ Various changes Multiple ALUs Merged ALU and Control Alternatives to ALU

3. © 2004, D. J. Foreman 3 Timing  Cycle – timing in a computer comes from a master clock controlled by a crystal oscillator  Clock ticks (million cycles / sec)  Frequency = 1/period and Period = 1/frequency  Let’s use 10 MHz to make the arithmetic easier ■ 10 MHz = 10 x 10 6 Hz = 10 7 Hz ■ Period is 1/10*1 / 10 6 =.1 µsec = 10 - 7 seconds  Terms ■ Giga = 10 9 and nano = 10 -9 ■ Mega = 10 6 and micro = 10 -6

4. © 2004, D. J. Foreman 4 Storage Speed Hierarchy  On the Motherboard ■ CPU Registers – extremely fast ■ Cache (CPU Internal) – very fast ■ Cache (External) – fast ■ Main Memory - slow  External ■ Flash disk – 0 latency ■ Magnetic Disks – high latency ■ Optical Disk – very high latency ■ Magnetic Tapes – seq'l, extremely high latency

5. © 2004, D. J. Foreman 5 Instruction Processing 1. Fetch – get instruction from RAM 2. Decode - h/w determines operation from bit pattern of first (or more) byte(s) 3. Obtain operand data ■ From Registers or RAM ■ Into ALU 4. Execute (perform the operation) 5. Store results back to RAM 6. Update Instruction Counter ■ (sometimes called Program Counter)

6. © 2004, D. J. Foreman 6 Device-Controller/Software Relationship Application API O/S Device driver Device controller Device S/W H/W

7. © 2004, D. J. Foreman 7 Device Controller Interface  Data width  Commands ■ Read ■ Write ■ Seek  Status codes ■ Busy ■ Error ■ Done ■ Ready

8. © 2004, D. J. Foreman 8 I/O Operations  Controller manages device  Devices are MUCH slower than CPU  CPU can process while device runs  Need to know when done ■ Polling (continual testing for "done") ■ Special h/w for notification – interrupt flag One bit in CPU (explore: 1 per device) Turned on by device controller Turned off by O/S No "race" conditions

9. © 2004, D. J. Foreman 9 Interrupt Handling Sequence  Controller (atomic action) ■ turns on flag ■ Sets code indicating which device  H/W (atomic action) ■ Switches to privileged mode, interrupts off ■ Sets IC to general interrupt handler in O/S  Kernel ■ Determines proper interrupt handler

10. © 2004, D. J. Foreman 10 Kernel Code Interrupt Handling  Save ■ User mode (kernel/user) ■ IC ■ Registers ■ Stack  Determine interrupt cause ■ I/O, error, service request, external signal  Jump to proper interrupt-handler

11. © 2004, D. J. Foreman 11 Kernel Returns to the User  Restores user's state & values ■ User mode (kernel/user) ■ Registers ■ Stack  Load IC with interrupts enabled Allows new interrupt before switching (return to processing on previous slide)

12. © 2004, D. J. Foreman 12 Trap or System Call Instruction  Atomic operation ■ Causes an interrupt (type=service request) ■ Kernel processes normally  Common service request handler ■ Uses code to select address in trap table ■ Trap table contains addresses of specific programs for specific request

13. © 2004, D. J. Foreman 13 Traps or Kernel Calls  Examples ■ Cout << x; ■ Seek (device, position); ■ X=ftime();  User functions expand into assembly code for a "trap" or "svc" instruction  "trap" causes a H/W switch to the kernel  Kernel performs op and returns to user

14. © 2004, D. J. Foreman 14 System call example fork (My_fork_loc); {● ● trap (K_FORK, *My_fork_loc); } My_fork_loc:…; *Do_fork Do_fork(loc) { ● ● start_process (loc); mode=0; return; } Trap table *Do_fork User spaceKernel space K_fork is entry # for "FORK" Kernel space

15. © 2004, D. J. Foreman 15 Instruction Processing with Interrupts fetchexecute Interrupts allowed? No yes previous inst Interrupt pending? No process interrupt yes

16. © 2004, D. J. Foreman 16 Direct Memory Addressing (DMA)  Allows device controller to access RAM w/o going through the CPU  Increases throughput  Reduces interrupt handling

17. © 2004, D. J. Foreman 17 Device addressing  Two methods shown in text: ■ Conventional External to RAM Limited only by size of device address ■ Memory-mapped devices Uses reserved part of RAM Limited by reserved space  Third method – used in some mainframes ■ Channels – addresses 00-0f (1 byte) ■ Sub-channels – addresses 00-ff (2 nd byte) ■ Total of 4096 independent devices (0000-0fff)

18. © 2004, D. J. Foreman 18 Loader Processing  Find the executable file  Resolve relative addresses within program to actual locations  Connect DLL's to procedure call structure ■ Shared collection of programs & entry points

19. © 2004, D. J. Foreman 19 Pipelined Instructions FetchDecodeExecute Store Fetch Decode Execute Store FetchDecodeExecuteStore Done t1, etct0

20. © 2004, D. J. Foreman 20 Software, Firmware, Hardware  Software ■ Programs you can install/remove/transport to another computer which are stored on disk, CD, etc and run from within RAM  Firmware ■ Programs usually installed only by chip maker and which run from within ROM ■ May be upgraded by user (depends on chip)  Hardware ■ The physical components of the system