1. Performed by: Sulkin Alex & Dattner Yoni. Instructor: Yosi Hipsh & Eli Shoshan. המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל Technion - Israel institute of technology department of Electrical Engineering דו ” ח סיכום פרויקט ( חלק א ’/ סופי ) Subject: Project name סמסטר חורף 2007 1

2. Abstract המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 2 The system is a communication system, like many others – but what makes this particular system “unique” that would require that much attention in the form of three whole separate projects (transmitter, synchronization and receiver team )? The answer is security. Quantum encryption using the BB84 protocol has been mathematically proven to be 100% secure in an ideal world without noise. This is mainly due to the uncertainty principle regarding photons. Generally speaking the purpose of this electro-optical communication array is to successfully encrypt a single photon, to transmit it via a secure channel to the receiver which is responsible for successful decryption of the photon and to keep track of the photons received.

3. System description המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 3 The communication system is dived into three main sub-systems: The transmitter - is responsible for the encryption of the photon and its transmission into the fiber optic data line. The synchronization unit – serves as a link between the transmitter and the receiver, simply speaking its role is to let the receiver know when he should be expecting a photon that was transmitted. The receiver – is responsible for receiving the signal from the sync unit and use it in order to receive the photon from the data channel (also known as quant channel). Transmitter unit - encrypt Synchronization unit Receiver unit - decrypt and count Sync optical line Data optical line

4. System Block Diagram המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 4

5. PCB block diagram. המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 5

6. 6 PCB stack-up. המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 6

7. 7 PCB layers. המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 7

8. FPGA Block Diagram המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 8

9. 9 Overall logic simulation המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 9 For every 10 photons 9 are stab and 1 data data = 40'b1000000000000000000000000000001000000000; Sending 4’b1001 Finished calibration – Now sending data

10. 10 Supplemental Values. המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 10 This project covered a broad area of high speed system design; starting from our own system level (receiver) and interface with the overall system. Both the block level design and Electrical design gave us a fairly extensive idea of how a typical high speed system is build. We were introduced with the following design tools, such as: Orcad,HyperLynx and Modelsim. The logical design of the FPGA and the signal integrity simulations (including the stack-up design) introduced us with practical problems a designer might encounter in the industry. The selection of the electrical components closely introduced us with the high speed ECL family and its characteristics. The project was mostly theoretical – we hope the fruits of our labor may be put to use (in that form or another) in the future.