1. LoopBuster Hardware Loop Detection in Fast Mesh Ethernet Networks Uriel Peled and Tal Kol Guided by Boaz Mizrahi Advised by Gideon Kaempfer Digital Systems Laboratory Faculty of Electrical Engineering, Technion Winter 2007 – Winter 2008 Introduction Presentation

2. Ethernet Networks Most Popular L2 Protocol Today A B C hello B hello all hello all hello all

3. Ethernet Drawbacks Tree Topologies For Loop Prevention hello all hello all hello all hello all hello all hello all hello all hello all hello all hello all hello all A B C

4. hello all hello all hello all A B C hello B The Problem?

5. LoopBuster Stop Loops Without Tree Topology A B C LoopBuster hello B

6. Design Considerations Support very high throughputs Ethernet supports 1Gbps and 10Gbps links Implementation must be in hardware Use limited amount of on-chip memory Naïve implementation requires 10Mbit for a single 10Gbps interface Minimal effect on hosting network Remove looping packets quickly Minimize false positives

7. Project Goal Support mesh topologies in Ethernet networks for performance enhancement Design and implement LoopBuster – hardware loop detector for Ethernet networks Dual 1Gbps interface FPGA Run LoopBuster in a real mesh network containing modified Switches Demonstrate performance gain with shortest path bridging

8. Conceptual Diagram packet packet packet packet packet packet packet packet packet packet Filter

9. Block Diagram 1Gbps LoopBuster PC

10. Project Milestones PRELIMINARY DESIGN software simulation(50), LB parameters(50), architecture(50), hardware design(50), hardware layout(50) 1/12/07 1/11/08 1/2/08 1/5/08 1/7/08 250hr 300hr 200hr 500hr DETAILED DESIGN micro architecture(100), logic implementation(100), logic simulation(100) PRODUCTION synthesis(100), circuit mechanics(50), circuit production(50) BRINGUP LB software driver(100), chip debug(200), circuit debug(100)

11. Status Today (4.12.07) Working on preliminary design Parts of software simulation ready Mid-Semester Presentation Expecting middle of preliminary design Software simulation ready Architecture layouts complete