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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Controls Overview LCLS Facility Advisory Committee October 13-14, 2004 Outline Goals Status update Resources Design Slides for Global Systems Assignments / Direction Through Continuing Resolution Tools/ Standards to adopt from the community for LCLS Next 6 months Conclusions
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 LCLS Control System Goals Provide a fully integrated control system to support the construction, test, installation, integration, operation and automation of the LCLS Accelerator Standardize on all devices and components across all subsystems. Identify all data either by pulse id, beam pulse related time stamp, or 500 msec rough time stamp. Full integration with the SLC – timing, use of LCLS data in SLC high level applications, and use of SLC data in LCLS Work with SLAC groups to provide an upgrade path for the SLC
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Update: May 2004 – Oct 2004 WBS Design Efforts for LINAC and Injector moved into Global Controls Conventional Facilities control system design integrated SLC-aware IOC is 20% Complete PNET VME Prototype 90% Complete Key Personnel Are In Place Some Hardware Selected for Evaluation Continuing Resolution Impacts the Plan Kickoff meetings of the Control System Team
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Key Personnel Are in Place Patrick Krejcik – Support Physicist, Control Requirements Bob Dalesio – Design, Conv fac., End stations Dayle Kotturi – LINAC/Injector CAM, Laser, LLRF, SLC aware IOC Stephanie Allison* – SLC-aware IOC, Timing Linda Hendrickson* – Fast Feedback Till Straumann* – BPMs / Diagnostics Diane Fairley – Machine Prot. Sys., SLC aware IOC Debbie Rogind – Vacuum, support SLC aware IOC Mario Ortega – Plant wiring, equip. cabinets, power req. Kristi Luchini – Power Supply Control John Dusatko – MPS Design, hardware support Patrick Bong – Personnel Protection System * Half time
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Personnel – Resources FY 2005 Q1 0.75 3.50 Q2 4.35 1.11 0.56 1.32 0.35 7.14 Q3 735 3.35 0.56 1.32 0.61 10.63 Q4 7.35 3.35 0.73 1.32 0.62 10.63 06 Q1 7.35 3.35 1.96 1.32.62 10.63 Ctl. Elec. Engineer Ctl. Sr. Elec. Tech. Ctl. Elec Tech. Pwr. Elec. Engineer Pwr. Sr. Elec. Tech. Control Prog. Continuing Resolution: take care of prototyping 1.75 in other WBS Ramp up Over 6 months to full complement
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Integration with the SLC Control System SLC Alpha All High Level Apps KISNet (fast closed loop control data) PNet (Pulse ID / User ID) MPG SLC Net (Data Communication) micro Camac I/O RF reference clock Xterm EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS WS Distributed High Level Applications Ethernet (EPICS Protocol) I/OC (SLC-aware) EVGEVG Micro emulator PNETPNET
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Global Communication Buses CPUCPU EVGEVG Beam Code + EPICS Time + EPICS Events LLRFLLRF 16 triggers CPUCPU EVREVR Diag 16 triggers IOC EVREVR CPUCPU EVREVR Pwr Supply Ctrl IOC Channel Access SLC Alpha Apps Xterm EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS WS Distributed High Level Applications CPUCPU Vacuum Ctrl SLC-Net over Ethernet Fast Feedback over Ethernet? Machine Protection Drive Laser Off Beam Stop In MPG PNETPNET
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Continuing Resolution - Direction Complete PNET Prototype (.33 FTE) Continue work on the SLC aware IOC (1.5 FTEs total) Prototype Echotek BPM in the SPPS (.50 FTE) Acquire / Test SLS Timing System – V2 later (.25 FTE) Acquire / Test SLS Digital Power Supply Controller (.50 FTE) Support LLRF Design / Prototype (.25) Complete rack, wiring, and power requirements (.25 FTE) Machine Protection System (.25 FTE) Video (.25) Inj, LINAC, Und, XBT, End Station, Conv Fac (1.5 FTE)
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Continuing Resolution Postpones Activities Personnel acquisition Develop prototype for 120 Hz Fast Feedback Develop prototype for position controllers Put together detailed designs per subsystem and have them reviewed – revamp costs. Interface Control Documents
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Current Meetings in Place Diagnostics and Controls – Patrick Krejcik Controls Architecture – Dayle Kotturi Top Down Issues – LH Hardware Performance Requirements – PK SLC impact into subsystem applications – SA Naming – SA SLC-aware IOC – Stephanie Allison Injector/LINAC – Patrick / Dayle / Mario attend Conventional Facilities – Mario attend
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Client Tools Display ManagerEDM ArchiverChannel Archiver / Oracle? Alarm HandlerALH Message LoggerCMLog Electronic Log Book DESY, Babar, JLAB? StripchartStripTool Web based viewingSPEAR, A-Beans, JoiMint,AIDA Image AnalysisMatlab format? Save / Restore? RDBSNS / PEP? Gateway3.14.6 Gateway
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Environment R/T OSRTEMS Workstation OSLINUX EPICS ADE (CVS)Argonne CompilersGNU Bug Report / TrackingArtemis Naming StandardPEP II Name ServiceName Server (JLAB),AIDA? DocumentationWeb Area Test stationsFFTB
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 High Level Applications MatlabAvailable for Physicists PythonAvailable for Physicists High Level Apps SLCAvailable AIDA, XAL, Matlab?? Top priorities to move into EPICS Which ones make the SLC-aware IOC easier Which are the most useful Which are the easiest to pick off
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Next 6 Months Complete SLC-aware IOC Complete PNET Prototype Complete BPM Prototype Complete Timing Prototype Complete Power Supply Prototype Complete Video Prototype Design Document for Maching Protection System – determine if there is something that we can evaluate Integrate Facility Controls, XRay Transport, Experimental Hall into the control system.
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Conclusions Good progress is being made on the items that are critical to our success: PNET interface and the SLC-aware IOC The control design is being integrated in all subsystems, however, the budget for X Ray Transport and End Stations has not been reworked to reflect any change. Conventional facilities has added control system support for integration. We are reducing our CAM and project engineering support through the continuing resolution to focus on bottoms-up prototyping and top-down design. Continuing resolution will be used to prototype hardware solutions for the next set of important decision: BPMs, Timing, Power Supply Controllers, LLRF.
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Timing Beam Code + EPICS Time + EPICS Events CPUCPU EVREVR Diag 16 triggers IOC CPUCPU EVREVR Power Supply Ctrl IOC CPUCPU Vacuum Ctrl Machine Protection Drive Laser Off SLC micro 476 MHz RF Reference Master Pattern Generator 128 bit beam code @ 360 Hz FIDO 119 MHz w/ 360 Hz fiducial Nsec resolution on the timing gates produced from the Event Rcvr 50 psec jitter pulse to pulse Event generator passes along beam code data from SLC Event generator sends events to receivers including: 360 Hz, 120 Hz, 10 Hz and 1 Hz fiducials last beam pulse OK Machine mode EPICS time stamp Event receivers produce to the IOC interrupts on events data from the event generator in registers 16 triggers with configurable delay and width CPUCPU EVGEVG LLRFLLRF 16 triggers IOC EVREVR MPG PNETPNET
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 SLC Net “Micro” Communication CPUCPU EVGEVG LLRF CPUCPU EVREVR Diag IOC EVREVR HPRF I/O Boards CPUCPU EVREVR Pwr Supply Ctrl IOC SLC Alpha Apps Xterm CPUCPU Vacuum Ctrl SLC-Net over Ethernet Provides data to SLC Applications from EPICS Operates at 10 Hz (not beam synched) Requires significant development in the IOC to emulate SLC “micro” in the IOC On an application by application basis we will evaluate what functions to provide
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Channel Access CPUCPU EVGEVG LLRF CPUCPU EVREVR Diag IOC EVREVR HPRF I/O Boards CPUCPU EVREVR Power Supply Ctrl IOC Channel Access SLC Alpha Apps Xterm EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS WS Distributed High Level Applications CPUCPU Vacuum Ctrl A channel access server in SLC provides data from existing SLC micros to EPICS applications All IOCs have both a channel access server to allow access and a client to have access Channel access provides read/write by all clients to all data with a server. All EPICS high level applications are channel access clients that may or may not have a server.
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Global Communication CPUCPU EVGEVG LLRF CPUCPU EVREVR Diag IOC EVREVR HPRF I/O Boards CPUCPU EVREVR Power Supply Ctrl IOC CPUCPU Vacuum Ctrl Fast Feedback over Ethernet? Fast feedback is required to run at 120 Hz Values will be transmitted from RF and selected diagnostics to Power Supply and RF IOCs The communication needs to be reliable, verifiable, and have a well thought out degradation The entire time budget to read, transmit, commute, control, and settle is 8.3 msec First estimates are that the control system can use 2 msecs to transmit and receive the data Can this be done over a common Ethernet with adequate bandwidth – or is a dedicated one needed?
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Machine Protection CPUCPU EVGEVG LLRF CPUCPU EVREVR Diag IOC EVREVR HPRF I/O Boards CPUCPU EVREVR Par Supply Ctrl IOC CPUCPU Vacuum Ctrl Machine Protection Drive Laser Off Single Beam Dumper Machine protection is used here to define faults requiring global mitigation Response time is under 8 msec There are two mitigation devices: Single Beam Dumper - which prohibits the beam from entering the undulator Drive Laser Off – which prohibits beam from entering the cavity Action must also be taken to reduce the repetition rate of the beam This new design is required to interrupt the beam before the next beam pulse.
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 LCLS Software Tasks – Development SLC-aware IOC Drivers for all new hardware Machine Protection / Mitigation Master pattern generator Fast Feedback Communication High Level Applications Correlation Plots Fast Feedback Loops Emittance reconstruction from wire scans and profile monitors Profile monitor image analysis for slice emittance with the transverse cavity Beam Steering and online orbit modeling Beam Steering “scans” to emittance reconstruction from wire scans and profile monitors
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 LCLS Software Tasks – Standardize/Acquire Data Archiving to support all phases of the project Operator Display Tools / Synoptic, Plots, Waveform, Image Alarm Management Electronic Log High Level Application Support: Matlab, XAL, Python Control System Configuration Tools Relational Database Management in all project aspects
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 LCLS Software Tasks – Control Programmer 1RF Control 2Diagnostics 2.1 Toroids & Faraday Cups 2.2 Beam Stops 2.3 Profile Monitors & Video Devices 2.4 Wire Scanners 2.5 Bunch Length Monitors & E/O Diagnostics 2.6 Beam Position Monitors 2.7 Collimators 2.8 All other stops 3Gun Laser and Drive Control 4Vacuum 5Magnet Power Supply Control IOC and software 6Beam Containment / Personnel Protection / Machine Protection
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 LCLS Hardware Tasks 1Global New timing boards – Master Pattern Generator and Event Receiver Boards Machine Protection System RF Control – New LLRF Control 2Diagnostics 2.1 Toroids & Faraday Cups 2.2 Beam Stops 2.3 Profile Monitors & Video Devices 2.4 Wire Scanners 2.5 Bunch Length Monitors & E/O Diagnostics 2.6 Beam Position Monitors 2.7 Collimators 2.8 All other stops 3Gun Laser and Drive Control 4Vacuum Standards 5Magnet Power Supply Controllers 6Beam Containment / Personnel Protection
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Injector Subsystem Designs Timing Digitizer EVREVR TCMTCM EVREVR CPUCPU CPUCPU RF Equipment LLRF 6 instances (1 for each klystron), 1 IOC in total 5 Toroids 1 IOC TCMTCM TCMTCM TCMTCM TCMTCM 1.2.2.3.2 1.2.2.2 EVREVR CPUCPU 4 Faraday Cups with YAGs, share toroid IOC BIBI BOBO GADCGADC 1.2.2.3.3 Preamps LEADLEAD LEAD LEADLEAD Mcond chassis Toroids MPS? Actuator PM Chassis Faraday Cups MKSU SLC
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Injector Subsystem Designs EVREVR CPUCPU BIBI BOBO Actuator PM Chassis 1.2.2.3.4 Turn Off MPS Tune Up Dump Beam Code + EPICS Time 11 Profile Monitors (4 YAGs, 7 OTRs), 1 IOC Ethernet EVREVR CPUCPU BIBI BOBO DACDAC Lamps & Actuator Cameras Electronics PM Chassis 1.2.2.3.5 Profile Monitors 1 Tune Up Dump, shares toroid IOC
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Injector Subsystem Designs Beam Code + EPICS Time EVREVR BPMBPM EVREVR CPUCPU CPUCPU E/O Diagnostic 1 Pulse length meas. share toroid IOC 21 BPMs 3 IOCs BPMBPM BPMBPM BPMBPM BPMBPM BPMBPM BPMBPM EVREVR CPUCPU BIBI BOBO AOAO GADCGADC SMCTLSMCTL Ilock Chs (2) Motor Controls 1.2.2.4 1.2.2.5 1.2.2.3.7 1.2.2.3.6 Thermocouples AIAI GADCGADC AOAO To llrf Cameras Electronics BPM Pickups Turn off Gun Laser and Heater Ctrls 48 Mirror Motors, 4 Shutters 1 Camera, Joulemeter 1 IOC
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Injector Subsystem Designs EVGEVG Beam Code + EPICS Time CPUCPU SLC Timing EVREVR GPIB?GPIB? CPUCPU 30 gauges BIBI BOBO AIAI AOAO AIAI GP307 IG HP937 CCG 30 ion pumps Power Supplies 4 bl valves SLAC PMVC 1.2.2.7 1.2.2.6 FIDO PNET 119 MHz w/ 360Hz Fid Network & Crates 1.2.2.8 LLRF? BCS? Manual valves into MPS? PPS MPS
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Injector Subsystem Designs Beam Code + EPICS Time EVREVR CPUCPU High Current High Precision Magnets w/ KLIXONS (4) BIOBIO Magnet Power Supplies (4) 1.2.2.9 Klixon Boxes PS Reg Interface Ethernet Low Current Fast Corrector and Quadrupoles Magnets MCOR Power Supplies (4?) 1.2.16.4 EVREVR CPUCPU PPS Gates Control Logix PLC (3) 1.2.2.10 1.2.16.1 1.2.16.3 Tone Receiver Control Logix PLC (1) Laser PPS Gates SAMSAM RTDRTD AIOAIO temperatures
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 LINAC Subsystem Designs Timing DACDAC EVREVR TCMTCM EVREVR CPUCPU CPUCPU RF Equipment LLRF 1 Phase Control 24/30 Remaining in SLC 6 Toroids 1 IOC TCMTCM TCMTCM TCMTCM TCMTCM 1.3.2.6.3 1.3.2.5 Preamps LEADLEAD LEAD LEADLEAD 20 Profile Monitors 1 IOC Ethernet EVREVR CPUCPU BIBI BOBO DACDAC Lamps & Actuator Cameras Electronics PM Chassis 1.3.2.6.5 Toroids Profile Monitors MKSU SLC GADCGADC TCMTCM
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 LINAC Subsystem Designs Beam Code + EPICS Time EVREVR BPMBPM CPUCPU 1 Pulse length meas. 143 BPMs 15 IOCs BPMBPM BPMBPM BPMBPM BPMBPM BPMBPM BPMBPM 1.3.2.6.2 BPM Pickups Ethernet EVREVR CPUCPU BIBI BOBO DACDAC Lamps & Actuator Cameras Electronics PM Chassis 1.3.2.6.5 E/O Diagnostics EVREVR CPUCPU SMSM ADCADC Motor elec 1.3.2.6.1 GADCGADC 20 Wire scanners – 11 new, 1 IOC HVPS BIBI BOBO LVDT Wire Scanners And Motors Photo Tube CPUCPU BIBI BOBO Actuator PM Chassis 1.3.2.6.4 Stoppers
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 LINAC Subsystem Designs Beam Code + EPICS Time EVREVR CPUCPU BIBI BOBO GADCGADC Mcond chassis Actuator PM Chassis Bunch Length Monitors 1.3.2.6.7 EVREVR CPUCPU BIBI BOBO Actuator PM Chassis 1.3.2.6.9 Turn Off MPS Single Beam Dump EVREVR CPUCPU BIBI BOBO ADCADC Actuator PM Chassis 1.3.2.6.10 E Beam Dump EVREVR CPUCPU BIBI BOBO ADCADC Actuator PM Chassis 1.3.2.6.11 Protection Collimator
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 LINAC Subsystem Designs Beam Code + EPICS Time X – Band Accelerator Structure Timing DACDAC EVREVR CPUCPU LLRF MKSU SLC GADCGADC EVREVR CPUCPU BIBI BOBO SMSM Actuator PM Chassis Movable Collimator 1.3.2.6.12 MKSU SLC 1.3.2.6.13
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 LINAC Subsystem Designs Beam Code + EPICS Time SLC Timing EVREVR GPIB?GPIB? CPUCPU gauges BIBI BOBO AIAI AOAO AIAI GP307 IG HP937 CCG ion pumps Power Supplies 4 bl valves SLAC PMVC 1.3.2.9 1.3.2.8 LLRF? BCS? 4 chassis for each type of interface PPS MPS EVREVR 24 sets of timing receiver modules
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 LINAC Subsystem Designs Beam Code + EPICS Time EVREVR CPUCPU PPS Gates Control Logix PLC (3) 1.3.2.1 EVREVR CPUCPU High Current High Precision Magnets w/ KLIXONS (4) Magnet Power Supplies 1.3.2.4 Klixon Boxes PS Reg Interface Ethernet Low Current Fast Corrector and Quadrapoles Magnets MCOR Power Supplies MPS Tone Receiver BSOIC Beam Containment System PLICPLIC BSOIC 1.3.2.2 1.3.2.6.8 1.3.2.3 BBUSBBUS VMICVMIC
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Undulator Subsystem Designs Beam Code + EPICS Time EVREVR CPUCPU AIAI SMCTLSMCTL Motor Controls 1.4.2.2.1 Wire Position Read-backs Fine Motion Control (strong back cradle motion) Motors EVREVR CPUCPU PIEZOPIEZO Motor Controls 1.4.2.2.2 Phase Corrector Motion Wire Scanners And Motors EVREVR CPUCPU SMSM ADCADC LVDT 1.4.2.2.6 GADCGADC Motor Controls 233 motors 4 * 33 controllers 11 wire scanners
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Undulator Subsystem Designs Beam Code + EPICS Time EVREVR BPMBPM CPUCPU 33 BPMs 33 IOCs BPMBPM BPMBPM BPMBPM BPMBPM BPMBPM BPMBPM EVREVR CPUCPU GADCGADC 1.4.2.3.2 1.4.2.3.1 BPM Pickups Charge Monitors (Toroid) EVREVR CPUCPU SMCTLSMCTL Motor Controls 1.4.2.2.7 Macroscopic Motion Control 55 controllers 2 Charge monitors 2 IOCs EVREVR CPUCPU GADCGADC 1.4.2.3.2 Scanning Wires ADCs 3 IOCs Downconverters
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Undulator Subsystem Designs 11 OTRs Ethernet EVREVR CPUCPU BIBI BOBO DACDAC Lamps & Actuator Cameras Electronics 1.4.2.4.1 Profile Monitors 7 stations Ethernet EVREVR CPUCPU BIBI BOBO DACDAC Lamps & Actuator Cameras Electronics 1.4.2.4.3 Observation Video 66 temperatures CPUCPU AIAI 1.4.2.5 AIAI AIAI AIAI Strongback Temperature Beam Code + EPICS Time
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Bob Dalesio Controls Overviewdalesio@lanl.gov October 13-14, 2004 Undulator Subsystem Designs Beam Code + EPICS Time GPIBGPIB CPUCPU 2 gauges BIBI BOBO AIAI AOAO AIAI GP307 IG HP937 CCG 33 ion Pumps * 6 Power Supplies ? bl valves SLAC PMVC 1.4.2.6.1 LLRF? BCS? 2 RGAs PPS CPUCPU Gauge RGA 1.4.2.6.4 MPSMPS CPUCPU 1.4.2.7 Tone Receiver Cherenkov Detector, Gamma Ray Detector, Temperature Ethernet
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