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5. Choose a flip-flop type for the state memory. ReturnNext 7.4 Clocked Synchronous State-Machine Design 1. Construct a state/output table corresponding to the word description or specification, using mnemonic names for the states. The steps for designing a clocked synchronous state machine: [ni(:) ’ m nik] adj. 记忆的, 记忆术的, 帮助记忆的 2. (Optional) Minimize the number of states in the state/output table(state minimization). 3. Choose a set of state variables and assign state-variable combinations to the named states. (state assignment) 4. Create a transition/output table. [ ’ sainm nt] n. 分配, 委派, 任务, ( 课外 ) 作业
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Design a clocked synchronous state machine with two inputs, A and B, and a single output Z that is 1 if: 7.4 Clocked Synchronous State-Machine Design 6. Construct an excitation table. 7. Derive excitation equations from the excitation table. 8. Derive output equations from the transition/ output table. 9. Draw a logic diagram. 7.4. 1 State-Machine Design Example 10. Check self-startup capability. Problem: NextBackReturn
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From the word description, we know the output of the state-machine depends only on the current state(what happened in previous clock period), so it’s a Moore machine. 7.4 Clocked Synchronous State-Machine Design (1) A had the same value at each of the two previous clock ticks, or (2) B has been 1 since the last that the first condition was true. Otherwise, the output should be 0 1. Construct State/Output Table Solution: NextBackReturn
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S 2 : Got A=1 on the previous tick, A≠1 on the tick before, and B≠1 at some time since the previous pair of equal A inputs. S 1 : Got A=0 on the previous tick, A≠0 on the tick before, and B≠1 at some time since the previous pair of equal A inputs. We can construct a state/output table template given in previous section. 7.4 Clocked Synchronous State-Machine Design 0 1 S 0 0 AB 1 0 1 1 Z S 0 : Initial state. S 3 : Got two equal A(=0) inputs, or B=1 after a pair of equal A inputs, and A=0 last. How many states we need at least for the oriental word description? S1S1 0S1S1 S2S2 S2S2 S3S3 0S3S3 S2S2 S2S2 S1S1 0S1S1 S4S4 S4S4 S3S3 1S3S3 S4S4 S2S2 S1S1 S0S0 S1S1 S2S2 S3S3 S4S4 1S3S3 S4S4 S4S4 NextBackReturn S 4 : Got two equal A(=1) inputs, or B=1 after a pair of equal A inputs, and A=1 last.
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A pair of equivalent states can be replaced by a single state. Two state S1 and S2 are equivalent if two conditions are true. 1. S1 and S2 must produce the same values at the state-machine output(s) 2. For each input combination, S1 and S2 must have either the same next state or equivalent next states. The state/output table constructed in previous page is “minimal”. If the other tables with more states(e.g. P368 Figure 7-51), we need minimize the number of states in such tables. 7.4 Clocked Synchronous State-Machine Design 2. State Minimization NextBackReturn
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How do we choose the best state assignment for a given problem? (See P570 ~571) NextBackReturn 7.4 Clocked Synchronous State-Machine Design 3. State Assignment The number of flip-flop needed to code s states is the smallest integer greater than or equal to log 2 s. If there are some unused states, the simplest assignment s coded states to 2 n possible states is to use the first s binary integers in binary counting order. But it isn’t always the best.
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NextBackReturn 7.4 Clocked Synchronous State-Machine Design We choose S 0 = Q 1 Q 2 Q 3 = 000, S 1 = Q 1 Q 2 Q 3 = 100, S 2 = Q 1 Q 2 Q 3 = 101, S 3 = Q 1 Q 2 Q 3 = 110, S 4 = Q 1 Q 2 Q 3 = 111. There are 5 states for our problem. The number of flip-flop is 3 (2<log 2 5<3). 4. Transition/output table 0 1 Q1Q2Q3Q1Q2Q3 0 0 AB 1 0 1 1 Z 0 0 0 1 0 0 1 0 1 1 1 0 1 1 1 1 0 0 1 1 0 1 0 0 1 1 0 1 0 0 1 1 0 1 0 0 1 1 0 1 0 1 1 1 1 1 0 1 1 1 1 1 0 1 1 1 1 0001100011
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NextBackReturn 7.4 Clocked Synchronous State-Machine Design 5. Transition/output Equations AB XXXX XXXX XXXX Q1Q2Q3Q1Q2Q3 00 01 11 10 000 001 011 010 110 111 101 100 11 11 111 111 XXXX XXXX XXXX 11 Q1Q2Q3Q1Q2Q3 00 01 11 10 000 001 011 010 110 111 101 100 11 11 11 11 AB XXXX XXXX XXXX Q1Q2Q3Q1Q2Q3 00 01 11 10 000 001 011 010 110 111 101 100 1111 1111 AB
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NextBackReturn 7.4 Clocked Synchronous State-Machine Design 6. Choose flip-flops type and derive excitation equations We can determine the excitation equations by transition equations and flip- flop characteristic equation. (1) If we choose D flip-flops, according to the D flip-flop characteristic equation, and the transition equations, we can obtain the excitation equations:
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NextBackReturn 7.4 Clocked Synchronous State-Machine Design (2) If we choose J-K flip-flops, according to the J-K flip-flop characteristic equation, and the transition equations,
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NextBackReturn 7.4 Clocked Synchronous State-Machine Design we can obtain the excitation equations: Notice: We obtained the excitation equations above maybe not minimal-cost, because we derived them from transition equations but not excitation table. The minimal-cost excitation equation. Are the excitation equations minimal- cost, which we obtained for D flip-flop?
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NextBackReturn 7.4 Clocked Synchronous State-Machine Design 7. Draw a logic diagram(Using D flip-flops) Simulation
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Design a clocked synchronous state machine with two inputs, X and Y, and one output Z. NextBackReturn 7.4 Clocked Synchronous State-Machine Design 8. Check Self-Startup Capability, the next states for the unused Because states 010, 001and 011 must be the used states (their first bit must be 1). So this clocked synchronous state-machine has self-start capability. Check self-startup capability by calculating the next states for the unused states. 7.4. 2 More State-Machine Design Examples Problem:
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The output should be 1 if the number of 1 inputs on X and Y since rest is a multiple of 4, and 0 otherwise. NextBackReturn 7.4 Clocked Synchronous State-Machine Design 1. Construct State/Output Table Solution: S0S0 1S1S1 S2S2 S1S1 S1S1 0S2S2 S3S3 S2S2 S2S2 0S3S3 S0S0 S3S3 S3S3 0S0S0 S1S1 S0S0 S0S0 S1S1 S2S2 S3S3 0 1 S 0 0 AB 1 0 1 1 Z S i : Got i 1s (modulo 4).
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NextBackReturn 7.4 Clocked Synchronous State-Machine Design 2. Transition/output table 3. Transition/output Equations XY 1 111 111 1 Q1Q2Q1Q2 00 01 11 10 00 01 11 10 0 10 11 0 1 01 1 01 01 00 1 0 00 0 10 00 01 11 10 0 1 Q1Q2Q1Q2 0 0 AB 1 0 1 1 Z XY 1 11 111 111 Q1Q2Q1Q2 00 01 11 10 00 01 11 10
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NextBackReturn 7.4 Clocked Synchronous State-Machine Design 4. Choose flip-flops type and derive excitation equations W choose D flip-flops, according to the D flip-flop characteristic equation, and the transition equations, we can obtain the excitation equations:
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NextBackReturn 7.4 Clocked Synchronous State-Machine Design 5. Draw a logic diagram(Using D flip-flops) Simulation
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BackReturn Summary 7.4 Clocked Synchronous State-Machine Design 1. Construct State/Output Table 2. Transition/output table 3. Transition/output Equations 4. Choose flip-flops type and derive excitation equations 5. Draw a logic diagram(Using D flip-flops)
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