1. L10 – Multiplication Division 1 Comp 411 – Fall 2009 10/19/2009 Binary Multipliers × 0123456789 00000000000 10123456789 2024681012141618 30369121518212427 404812162024283236 5051015202530354045 6061218243036424854 7071421283542495663 8081624324048566472 9091827364554637281 Reading: Study Chapter 3.1-3.4 (including Booth coding) × 01 000 101 You’ve got to be kidding… It can’t be that easy The key trick of multiplication is memorizing a digit-to-digit table… Everything else was just adding

2. L10 – Multiplication Division 2 Comp 411 – Fall 2009 10/19/2009 Binary Multiplication A0A0 A1A1 A2A2 A3A3 B0B0 B1B1 B2B2 B3B3 A0B0A0B0 A1B0A1B0 A2B0A2B0 A3B0A3B0 A0B1A0B1 A1B1A1B1 A2B1A2B1 A3B1A3B1 A0B2A0B2 A1B2A1B2 A2B2A2B2 A3B2A3B2 A0B3A0B3 A1B3A1B3 A2B3A2B3 A3B3A3B3 x + A j B i is a “partial product” Multiplying N-digit number by M-digit number gives (N+M)-digit result Easy part: forming partial products (just an AND gate since B I is either 0 or 1) Hard part: adding M, N-bit partial products 101 000 10X The “Binary” Multiplication Table Hey, that looks like an AND gate Binary multiplication is implemented using the same basic longhand algorithm that you learned in grade school.

3. L10 – Multiplication Division 3 Comp 411 – Fall 2009 10/19/2009 Multiplication: Implementation t 32nd repetition? Start Multiplier0 = 0Multiplier0 = 1 No: < 32 repetitions Yes: 32 repetitions

4. L10 – Multiplication Division 4 Comp 411 – Fall 2009 10/19/2009 Second Version Multiplier Shift right Write 32 bits 64 bits 32 bits Shift right Multiplicand 32-bit ALU ProductControl test ift the Multiplier register right 1 bit 32nd repetition? Start Multiplier0 = 0Multiplier0 = 1 No: < 32 repetitions Yes: 32 repetitions

5. L10 – Multiplication Division 5 Comp 411 – Fall 2009 10/19/2009 Example for second version 0010 1100 0001 0110 00100001 0000 Test true shift right 4 0001 1000 0000 1100 00100010 0001 Test false shift right 3 0011 0000 0001 1000 00100101 0010 Test true shift right 2 0010 0000 0001 0000 00101011 0101 Test true shift right 1 0000 00101011Initial0 ProductMultiplicandMultiplierStepIteration

6. L10 – Multiplication Division 6 Comp 411 – Fall 2009 10/19/2009 Final Version Control test Write 32 bits 64 bits Shift right Product Multiplicand 32-bit ALU epetition? Start Product0 = 0Product0 = 1 No: < 32 repetitions Yes: 32 repetitions The trick is to use the lower half of the product to hold the multiplier during the operation.

7. L10 – Multiplication Division 7 Comp 411 – Fall 2009 10/19/2009 What about the sign? Positive numbers are easy. How about negative numbers? Please read Booth coding in textbook

8. L10 – Multiplication Division 8 Comp 411 – Fall 2009 10/19/2009 Faster Multiply A1 & BA0 & B A2 & B A3 & B A31 & B P1P2P0 P31 P32-P63

9. L10 – Multiplication Division 9 Comp 411 – Fall 2009 10/19/2009 Simple Combinational Multiplier t PD = 10 * t PD,FA not 16 NB: this circuit only works for nonnegative operands Components N * HA N(N-1) * FA The Logic of a Half- Adder CO A B S HA A Co B S HA A Co B S HA A Co B S HA A Co B S t PD = (2*(N-1) + N) * t PD,FA

10. L10 – Multiplication Division 10 Comp 411 – Fall 2009 10/19/2009 Carry-Save Combinational Multiplier t PD = 8 * t PD,FA Components N * HA N 2 * FA Observation: Rather than propagating the sums across each row, the carries can instead be forwarded onto the next column of the following row This small improvement in performance hardly seems worth the effort, however, this design is easier to pipeline. These Adders can be removed, and the AND gate outputs tied directly to the Carry inputs of the next stage. t PD = (N+N) * t PD,FA

11. L10 – Multiplication Division 11 Comp 411 – Fall 2009 10/19/2009 Division Start 1. Subtract Divisor from the Remainder leave the result in the Remainder Test Remainder Shift Quotient to the left set its rightmost bit = 1 Restore Remainder by adding Divisor Shift Quotient to the left set its rightmost bit = 0 Shift Divisor Register right 1 bit Repeat 33 times >=0<0