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Implementation of a satellite on a Multi-Core System A project by: Daniel Aranki Mohammad Nassar Supervised by: Mony Orbach Winter 2009 Characterization.

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Presentation on theme: "Implementation of a satellite on a Multi-Core System A project by: Daniel Aranki Mohammad Nassar Supervised by: Mony Orbach Winter 2009 Characterization."— Presentation transcript:

1 Implementation of a satellite on a Multi-Core System A project by: Daniel Aranki Mohammad Nassar Supervised by: Mony Orbach Winter 2009 Characterization presentation 14/12/2008 Single semester Project

2 Introduction A satellite is an object that consists of a bench of sensors and functions The sensors and functions of a satellite are usually orthogonal A Multi-Core processor can be used to implement a satellite processor Plurality has designed a Multi-Core processor. The Plurality processor has a unique architecture.

3 Motivation As said earlier, a Multi-Core processor can be a good candidate for implementing a satellite. The satellite system is a real-time system so we need to make sure that every sensor gets a real time service. Old satellite systems was implemented by using one core only, which caused lots of problems like: Real time services Reliability: if the only core was damaged, the whole satellite is locked out Parallel design is different than serial design.

4 Project Objectives To implement a satellite system simulator on a Multi-core system Understand the needs of a satellite system Real-Time tasks Reliability tasks Learn to think parallel Evaluate some performance results for further comparison

5 The Plurality processor architecture The cores: 256 RISC SPARC based cores Capable of performing basic arithmetic operations Helper units: One helper unit for each 4 cores The helper unit performs multiplication and division Scheduler: It is responsible to distribute the tasks between the cores with minimal overhead Memory system: The Plurality processor has a shared memory architecture that allows any number of cores to access both data and instruction memory at any cycle

6 The processor architecture - cont

7 Plurality programming model Plurality has a programming model of its own which is called Task Oriented Programming (TOP) Two main categories of tasks: Regular tasks Duplicable tasks (Which can be parallelized) The whole task will be described a task map (of the two types) with dependencies between the jobs.

8 TOP example (WiFi Camera) Init Temperature sensor Camera sensor Send data Cooling system Low Power Duplicable Normal

9 Tasks Characterization Sensors control Every sensor has a unique requirement. Reliability (Heat sensor, Cosmic rays sensor) Real-Time (Camera, Communication antennas) Each group of processors will run a specific task independently of other processors – Real-Time requirement can be met Reliability is solved by saving several copies of the same data. In case of a mismatch between the copies, a “poll” can be taken (between the copies).

10 Working environment Plurality has a software simulator of their Multi-Core processor. The editor that is going to be used is the Eclipse editor. Cygwin is a unix emulator under Microsoft Windows.

11 Alternatives Some alternatives for the Plurality Hyper-Core processor: Rapport’s Kilocore Intel’s x86-64 Core 2 Quad (or Duo) Compatibility issues

12 Rapport Kilocore processor A very low-power processor Compatibility to Plurality’s HAL: The Rapport Kilocore processor doesn’t have the TOP model. Includes I/O Low scheduling overhead Shared memory Their tools-suite is compatible with Ecplise editor

13 Timeline Get to know the environment. Done. Implement some simple (existing) parallel algorithm Define the uArchitecture of the system Partition the tasks of the uArchitecture in a parallel way for implementation Mid-term presentation Implementation and testing of the system Final presentation

14 Gant Chart


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