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Low-Noise Trans-impedance Amplifiers (TIAs) for Communication System Jie Zou Faculty Advisor: Dr. Kamran Entesari, Graduate Advisor: Sarmad Musa Department of Electrical and Computer Engineering at Texas A&M University Department of Electrical and Computer Engineering Texas A&M University College Station, TX 77843-3128 Undergraduate Summer Research Grant Program Improvement TechniqueNo Gain BoostingGain Boosting Supply Voltage3V Trans-impedance Gain57.858dB Ω72.354dB Ω Bandwidth(-3dB)621.8M Hz337.34M Hz Total Output RMS Noise0.27mV0.45 mV Total Input Referred RMS Noise9900nA122.7nA Technology LibraryAMI 0.6-um C5NAMI 0.60-um C5N One of the most challenging goals of modern digital communication system is the implementation of a Gbps-level telecommunication networks. It becomes very challenging for a communication system to transmit the high speed data with a wide bandwidth. The goal of an optical communication system is to carry large volumes of data across a long distance. As depicted in Figure 1, a simple optical communication system mainly consists of three components: 1)an electro-optical transducer, which converts the electrical data to optical form; 2)an optical fiber, which carries the light produced by the laser; 3)a photo-detector, which senses the light at the end of the fiber and converts it to an electrical signal [1]. Figure 1 Simple Optical Communication System An electro-optical transducer consists of a multiplexer (MUX), a laser driver which delivers large currents to the laser and a laser diode. A photo-detector consists of a photodiode which converts light from the fiber to an electrical current signal. A trans-impedance amplifier amplifies the photodiode output with low noise and sufficient bandwidth, and converts it to a voltage. A limiting amplifier (LA) converts the output swing of TIA to a sufficient logic level and clock data recovery (CDR). In an optical receiver, trans-impedance amplifier (TIA) converts the current (~10uA) generated by photo diode to a voltage signal for LA and CDR. The low cost and high integration of CMOS technology have motivated extensive work on high-speed CMOS design. The design of TIAs requires many trade-offs among noise, bandwidth, gain, and supply voltage, presenting difficult challenges in both CMOS and bipolar technologies. III. Case Study for Open-loop stage TIAs Simulation Results Figure 3 Schematic of A Open-loop Stage TIA I. Introduction Table 1 Performance Summary Table 2 Noise Distribution From the Table 1, we can observe that the TIA with the gain boosting improvement technique has a higher trans-impedance gain and much less total input referred RMS noise than the one without current mirror. The biggest advantage of gain boosting technique can increase M 0 DC current a lot without causing the voltage headroom problem. If I D0 increases, the value of g m + g mb increases a lot, so the input noise current decreases, but the bandwidth would be limited. From the Table 2, we can see that the device of PMOS 0 and PMOS 1 contribute 76.57% of total noise, because the drain-bulk and drain- gate capacitances of M4 may substantially increase the time constant at the node of drain of M4, which is caused by the reason that the PMOS transistor suffers from low mobility and must therefore be quite wide to carry a large current with a reasonable drain-source voltage. This paper analyzes the trans-impedance gain, bandwidth, and noise performance of open-loop stage TIAs, and discusses the trade-offs noise, bandwidth, gain, and supply voltage. In the case study for open-loop stage trans- impedance amplifier, the example circuit can have a very high 72.354dB Ω gain and a low 122.7nA total input RMS referred noise, but it has a very narrow bandwidth of only 337.34M Hz. Thus, It needs further research on the bandwidth of TIAs and the improvement designs for the buffer stage of TIAs. IV. Conclusion [1] B. Razavi, Design of Integrated Circuit for Optical Communications, McGraw-Hill, 2003 Selected References Figure 2 CG stage at high frequencies The trans-impedance gain calculation is as follow: For s = 0, V out / I in = R D. In the typical design, the input pole, (g m1 +g mb1 )/C in, may be closer to the origin compared to the output pole, 1/(R D C out ), because the photodiode capacitance is quite large (in the range of 100 to 500 fF). The calculation of the total output noise voltage and the total input-referred noise current: This result can be interpreted as the noise of M 1 integrated across a bandwidth of ω p,out /4 plus the noise of M 2 integrated across a bandwidth of ω p,in /2. The noise contributed by M 1 directly scales with C in and the frequency. The noise contributed by R D to the input also rises as |C in s| becomes comparable with g m1 +g mb1. If R D is decreased to accommodate a greater bias current, then its noise current increase and the trans- impedance gain falls. If M 2 is made wider to allow a smaller V DS2, both its noise current and drain capacitance increase. Figure 4 Small Signal Frequency Response Figure 6 Effect of R 0 Component for Transimpedance Gain Figure 7 Effect of C 0 Component for Transimpedance Gain Figure 5 Small Signal Frequency Response (No Gain Boosting) For a given photodiode capacitance, the bandwidth of TIA is maximized by minimizing the input resistance of circuit. Thus, the circuit should be able to provide both a low input resistance and a high gain. An amplifier stage exhibits a low impedance is the common- gate (CG) (for field device) or common-base (CB) (for bipolar devices) topologies. Let us discuss the common-gate stage topology at high frequencies, base on the Figure 2. II. Topology of Open-Loop Stage Amplifiers
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