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1 San Jose State University Department of Electrical Engineering EE 166 Project Spring 2003 Phase Frequency Detector (PFD) Prof. David Parent Group Members:Marcella Grant Robert Shen Han Duong Jeremiah Martin
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2 OUTLINE Introduction Specifications Design Flow Results Conclusion
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3 What is a PFD? Component used in a PLL that compares two signals. Evaluates Phase and Frequency The output voltage gives the information of the phase and frequency differences of two signals.
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4 Specifications Process:AMI06 Frequency:≥ 200 MHz Power:≤.25 Watts Duty Cycle:50% VDD:5 V Inputs:2 Outputs:2
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5 Schematic of PFD
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6 Design Flow
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7 Transistor Level of PFD
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8 Test Bench
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9 Layout View
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10 LVS Report
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11 Transient Analysis
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12 DC Analysis
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13 Results
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14 Conclusion Successfully Designed and Implemented PFD for our PLL project. Met all Specifications.
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