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SGH-Q200 Service Training
Kyoungin Kim R&D Group 3, Mobile Comm. Div. Samsung Electronics
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CONTENTS General Information How to assemble the SGH-Q200
Block Diagram and Schematics Circuit Description Phone test Download, Autocal, IMEI , Repair PGM.. Power Levels and Waveforms on PBA Troubleshooting Guide (Refer to SVC Manual)
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General Information Frequency range: Channel bandwidth: 200kHz
EGSM DCS TX 880~915MHz 1710~1785MHz RX 935~960MHz 1805~1880MHz Channel bandwidth: 200kHz Fundamental frequency:13MHz Intermediate frequencies Tx IF: 270MHz(G), 135MHz(D) Rx IF: 1’st IF ->225Hz, 2’nd IF -> 45MHz
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General Information Solution : Agere system(Lucent technology)
Design : Dual folder LCD : 128 x 128 Memory : 48M/4M Size and Weight :85(H)x47(W)x19.8(D), 90g Funtion : GPRS Class 8, EFR/FR, WAP, GAME ..etc Operating Time Talk TIME Stand by TIME SLIM(720mA) Up to 150min Up to 70 hr STANDARD(900mA) Up to 180min Up to 85 hr
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General Information The chipset for SGH-Q200
Trident : Baseband processor CSP : conversion signal processor PSC2005 : Power Management IC LRS1337 : Flash Memory(SRAM) Atmel : Flash Memory APCIC : Auto Power Control IC BRIGHT3 : Dual band Tranceiver
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Exploded View of SGH-Q200
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Top View of SGH-Q200
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Bottom View of SGH-Q200
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Block Diagram (Radio Part)
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Block Diagram (Baseband Part)
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Circuit Description: Front-End
Antenna (ANT1002) Transmitting and Receiving the information desired from air interface. RF Test Switch (CN1001) This is for adjusting and testing the handset in conjunction with the test equipment such as HP8922M or HP8960. Diplexer (U1006) It operates such like a combination of Rx filter and Tx filter, and provides agreeable isolation between Tx and Rx.
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Circuit Description: Rx
LNA It amplifies weak signal by 14~20dB without increasing the noise significantly. This provides “Step Gain AGC” of ~35dB so that it supplements narrow dynamic range of Rx AGC. RF Rx SAW Filter (F901:GSM , F903:DCS) It has the bandwidth of Rx frequencies, and suppresses interferers which can do affect the IF signal 1st Down-conversion Mixer Received RF carrier is converted to 1st IF (225MHz). Local signal is needed for frequency mixing. It has ~9dB conversion gain, in general.
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Circuit Description: Rx
IF SAW Filter (F902) Center frequency is 225MHz. It suppresses unwanted image signals made in the 1st mixer 2nd Down-conversion Mixer 1st IF is converted to 2nd IF of 45MHz.. 2nd IF LC Filter It has 200kHz bandwidth with 45MHz center frequency. It attenuates images from the 2nd mixer RSSI It produces DC voltage according to the received signal strength.
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Circuit Description: Rx
PGA Sets the programmable gain array to one of 50 values separated by 2dB [000000] ~[110001]
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Circuit Description: Rx - Digital
Rx AGC The purpose of Rx AGC is to maintain the Rx I/Q voltage level, regardless of the received signal strength. In general, Rx AGC has the dynamic range of around 70dB.. Rx I/Q Demodulator It generates both in-phase (I) and quadrature (Q) components of the signal while translating the IF signal to baseband.
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Circuit Description: Local
VC-TCXO (OSC801) 13MHz fundamental frequency for PLLs and Baseband chipset (U601). RF VCO (OSC901) It supplies Local source frequency higher than RF carrier by 225MHz in conjunction with PLL(GSM) Lower than RF carrier by 225MHz in conjuntion with PLL(DCS) Higher than Tx RF carrier by 270MHz in conjuntion with PLL IF VCO (OSC902) It generates 1080MHz frequency for up-converting Tx I/Q signal to Tx IF and Rx signal to RxIF TX VCO (OSC903) Frequency : 880~915MHz(G), 1710~1785MHz(D)
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Circuit Description: Tx
1.Tx I/Q modulator Tx I and Q signals are combined and up-converted to 270(G),135(D)MHz frequency. I, Q voltage levels are 1Vp-p, respectively. 2.PAM (U1002) It increases Tx power level so that PA is capable of transmitting the maximum power up to 35dBm High gain 3stage amplifier: 0dBm input Typ 2in/2out dual band amplifier One power control pin with one band switch
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Circuit Description: Tx
APCIC (U1001) Dual Band Power control IC for TX power Amp has ~55 dB dynamic range, Contains power detector and operantional Amp converts RF power into DC level. 2. Coupler :F1001(G), F1002(D) The coupling factor is 14dB,20dB. That is, “P(PA output) – 14dB,-20dB” is transmitted to the power detector circuitry
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Circuit Description: Logic
TRIDENT (U601) Baseband Engine Includes the DSP16000 core,ARM7TDMI microcontroller core,and a standard sets of peripherals for the DSP and ARM communicates with Memory, Keypad, LCD, and other peripherals DSP RAM :20k x 16 DSP ROM : 144k x 16 ARM RAM : 2k x 32 RAM(byte writable) ARM ROM : 4k x 32 ROM(mask-programmable) Processor Interface memory : 512 x 16 shared RAM
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Circuit Description: Logic
TRIDENT (U601) ARM7TDMI 32-bit microprocessor : main call processing. 32.768kHz X-tal Oscillator : the sleep mode The interface circuitry : reset circuit, address bus (A0-A20), data bus (D0-D15), contrognals(CP_WEN,CP_OEN,EAR_EN,LED_CTL, etc), GPIOs, and the communication ports. Communication ports : UART1 and 2, the JTAG etc. UART1 supports HP equipment interface, down loading, and data service. UART2 and the JTAG are used for the software debugging.
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Circuit Description: Logic
CSP 1099 (U701) Baseband radio and voiceband audio interfaces Baseband receive path Buffer, 10-bit ADC, PGA Baseband transmit path Transmit buffer, GMSK modulator, 9-bit DAC ADC and DACs for Radio and Monitoring 10-bit ADC for sampling RSSI, TXP, and etc Voiceband Receive Path :speaker , mic Event timing and control register To control both B/B receive and B/B transmit activity Power ramping control
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Circuit Description: Logic
PMIC(PSC2005:U101) Includes six low-dropout voltage regulator LDO1-1.8v, LDO2:VCCD, LDO3:Vrf LDO4-Vapc,LDO5:Vosc/syn,LDO6:VCCA 250ms system reset generator To ensure proper initialization of the system controller 12bit monotonic DAC Pwr_sw1,Pwr_sw2,CS => active low.
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Circuit Description: Logic
Flash memory Flash ROM:U501(32M x 1),U1010(16M x1) The 48Mbit FLASH ROM is used to store code of the application program. Using the down-loader program, this application program can be changed even after the mobile is fully assembled. SRAM The 4Mbit SRAM is used to store the internal flag information, call processing data, and timer data.
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Circuit Description: Logic
Power On Press of END key BATT and POW_ON signals are connected Q204 turn-on Q102 turn-on, that is, BATT is connected to VBAT VBAT is supplied to U101 VCCD and VCCA are applied to U101, U601 VCTCXO signal is enabled VC-TCXO (OSC801) is operating Once U601 runs without error, U601 enables POWER_KEEP signal Power Off Press of END key Q204 turn-on U601 checks BB_PWR turns logic high to low Main application program enter to Power Off mode
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Circuit Description: Logic
Key Pad The Key Pad is belong to main board. For key-press recognition, the structure of key is consisted of 5 x 5 matrix, which is used input signal key_col(0-4) and output signal key_row(0-4) of Trident. LCD MODULE LCD module is connected to main board by FPCB. This contains an LCD controller. An LCD controller controls the information of displaying from the Trident (parallel 8-bit data) to the LCD.
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Test Interface Jig Data cable Test cable
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Downloading Setup
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Auto calibration Program Setting
GPIB CABLE E3632A HP GPIB CARD
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Auto calibration Processing
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Auto calibration Processing
click click click
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Auto calibration Processing
click
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Auto calibration Processing
click
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IMEI Processing 1.execute winl108tQ200.exe file 2. Select country
3. Click Change H/W ver click
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IMEI Processing 1.write H/W ver 2.click write IMEI
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IMEI Processing 2.write imei 1.click 3.click 4.click
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Repair program Processing
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Repair program Processing
click click
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Repair program Processing
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Repair program Processing
click
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Phone Test Setup PC GPIB CABLE HP8960 Power Supply Gpib cardt
TEST PACK GPRS TEST JIG POWER ON SDS S/W DC 4.0V SAMSUNG DEBUG SDS D/L DSP JTAG HP8960 Power Supply Gpib cardt RF Test Cable PC Com1 port
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Test Information Test Equipment is HP8960 or CMD55. Mode : Test mode
(Tx : BCH+TCH, Rx : CW generator) Tx power level pass/fail limit have to be modified to allow calibrated Tx power levels of SGH-Q200
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Power Level & Voltage Waveform Rx Chain – Analog: Measurement Environment
Test Mode Cont Rx on HP Setup: RF Generator Screen RF input = -50dBm, RF Gen Freq = 947MHz, (Channel is 60) RF Gen Band =GSM
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Power Level & Voltage Waveform Rx Chain
Ant s/w In LNA In LNA out
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Power Level & Voltage Waveform Rx Chain
Mixer In Mixer out IF SAW Out
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Power Level & Voltage Waveform Rx Chain
2’nd mixer out
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Power Level & Voltage Waveform Tx Chain
Active Cell mode HP Setup RF input = -50dBm, TCH Channel = 60CH RF Gen Band = GSM
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Power Level & Voltage Waveform Tx Chain
Tx locking 0.8~2.5V TxIP TXEN1
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Voltage Waveforms: Local
OSC901 RF 62CH OSC902 IF Local
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Voltage Waveforms: Logic
OSC801.4 13MHz TCXO Out osc601 32.768kHz clock
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Repair Examples
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Baseband Problems Power-On Failure
Abnormal Operation of Charging and EL Backlight Abnormal Operation of Vibrator and Buzzer Abnormal Operation of Key, MIC, and LED RF Part : Refer to SVC manual
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Checkpoints: Power-On Failure
1.Press END Key or Turn On Auto Power on SW of interface test jig 2.check following Name Node Value VBAT VCON2.1 >3.3V? VCCD U101.4 >2.85V? NO=>check U101,C112 Vrf,Vosc,Vsyn U101.31,35,36 =3.0V? No=>U101.1=1.8V? No=>check U101,C103,C104,C120 Check clock signal U801.4 Freq=13MHz? Vrms>300mV? 900mVpp? No=>check u801,osc801 3. Memory check
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Checkpoints: Charging and EL Backlight
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Checkpoints: Vibrator and Buzzer
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Checkpoints: Key, MIC, and LED
Key recognition check Metal Dome Array CN202 pin#1,2,3, and 4 VCTCXO_IN (C807) MIC check MIC400 contact U401 pin#1,2,and5 LED check Control signal =>keypad LED: LED_CTL, =>SVC_LED: SVC_LED(Q601.2:high,Q601.3:low) VCC
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Thank you!!
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