1. courseware Force-Directed Scheduling Sune Fallgaard Nielsen Informatics and Mathematical Modelling Technical University of Denmark Richard Petersens Plads, Building 321 DK2800 Lyngby, Denmark

2. SoC-MOBINET courseware[M-1] High-Level Synthesis2 Overview / Agenda  Motivation  Introduction  Defining problem and model  Solution  Results  Conclussion

3. SoC-MOBINET courseware[M-1] High-Level Synthesis3 Motivation  The mapping from a behavioral model to a physical Register-Transfer level description is a NP-complete problem.  Therefore an exhaustive comparison on all possible solutions is infeasible.  An algorithm finding an efficient mapping is required.

4. SoC-MOBINET courseware[M-1] High-Level Synthesis4 Introduction  The paper was written in 1989.  The interest on High-Level Languages like VHDL is increasing at that time.  Synthesis tools capable of generating a RTL realization from a behavioral model is needed.

5. SoC-MOBINET courseware[M-1] High-Level Synthesis5 Introduction implementation design specification Physical domain Mathematical domain specification create a model of the physical problem synthesis create an alogorithm to solve the problem implementation Transform the optimized model back to the physical domain

6. SoC-MOBINET courseware[M-1] High-Level Synthesis6 Introduction implementation design specification Physical domain Mathematical domain specification create a model of the physical problem synthesis create an alogorithm to solve the problem implementation Transform the optimized model back to the physical domain

7. SoC-MOBINET courseware[M-1] High-Level Synthesis7 Defining problem and model  The problem: For a given function, find an optimal solution. An optimal solution can be constrainted by area-, power-, performance- or flexibility requirements depending on the application.  The model: Scheduling : Determine for each operation the time at which it should be performed without violating any precedence contraints.

8. SoC-MOBINET courseware[M-1] High-Level Synthesis8 Solution Common Approach New Approach List Scheduling Force-Directed Scheduling Resources given Time contraints given Minimize delay Minimize required resources

9. SoC-MOBINET courseware[M-1] High-Level Synthesis9 Solution Common Approach New Approach List Scheduling Force-Directed Scheduling Resources given Time contraints given Minimize delay Minimize required resources

10. SoC-MOBINET courseware[M-1] High-Level Synthesis10 Force-Directed Scheduling The Force-Directed Scheduling approach reduces the amount of: Functional Units Registers Interconnect This is achieved by balancing the concurrency of operations to ensure a high utilization of each unit.

11. SoC-MOBINET courseware[M-1] High-Level Synthesis11 Force-Directed Scheduling The Force-Directed Scheduling algorithm consists of 3 steps: 1.Determine a time frame of each operation 2.Create a distribution graph 3.Calculate the force (a new metric)

12. SoC-MOBINET courseware[M-1] High-Level Synthesis12 Scheduling – An example  Solve the differential equation y’’ + 3zy’ + 3y = 0  This can be calculated using this iterative algorithm while(z < a) repeat zl := z + dz; ul := u – (3 · z · u · dz) – (3 · y · dz); yl := y + (u · dz); z := zl; u := ul; y := yl;

13. SoC-MOBINET courseware[M-1] High-Level Synthesis13 Scheduling – An example Data-Flow and Control-Flow Graphs ASAP SchedulingALAP Scheduling

14. SoC-MOBINET courseware[M-1] High-Level Synthesis14 Scheduling – An example Data-Flow and Control-Flow Graphs ASAP SchedulingALAP Scheduling

15. SoC-MOBINET courseware[M-1] High-Level Synthesis15 Scheduling – An example Step 1 : Determine a time frame of each operation Error in Figure

16. SoC-MOBINET courseware[M-1] High-Level Synthesis16 Scheduling – An example Step 2 : Create a distribution graph DG(1) = 2.833DG(3) = 0.833 DG(2) = 2.333DG(4) = 0

17. SoC-MOBINET courseware[M-1] High-Level Synthesis17 Scheduling – An example A metric called force is introduced. The force is used to optimize the utilization of units. A high positive force value indicates a poor utilization. Step 3 : Calculate the force (a new metric)

18. SoC-MOBINET courseware[M-1] High-Level Synthesis18 Scheduling – An example Step 3 : Calculate the force (a new metric) Fixed Free

19. SoC-MOBINET courseware[M-1] High-Level Synthesis19 Scheduling – An example Step 3 : Calculate the force (a new metric) With the operation x’ in control-step 1. DG(1) = 2.833DG(3) = 0.833 DG(2) = 2.333DG(4) = 0 Poor utilization

20. SoC-MOBINET courseware[M-1] High-Level Synthesis20 Scheduling – An example Step 3 : Calculate the force (a new metric) With the operation x’ in control-step 2. (x’’ must be in control-step 3) DG(1) = 2.833DG(3) = 0.833 DG(2) = 2.333DG(4) = 0 Good utilization Direct force (calculated as before) Indirect force (on x’’ in control-step 3)

21. SoC-MOBINET courseware[M-1] High-Level Synthesis21 Scheduling – An example By repeatedly assigning operations to various control-steps and calculating the force associated with the choice several force values will be available. The Force-directed scheduling algorithm chooses the assignment with the lowest force value, which also balances the concurrency of operations most efficiently.

22. SoC-MOBINET courseware[M-1] High-Level Synthesis22 Force-Directed Scheduling The Force-Directed Scheduling approach reduces the amount of: Functional Units Registers Interconnect By introducing Registers and Interconnect as storage operations, the force is calcuted for these as well. The 3 steps of the algorithm are carried out for these operations also.

23. SoC-MOBINET courseware[M-1] High-Level Synthesis23 Force-Directed Scheduling

24. SoC-MOBINET courseware[M-1] High-Level Synthesis24 Force-Directed Scheduling Introducing Registers and Interconnect as operations. Since the Registers and Interconnect area consumption is reduced in solution b, it might be optimal.

25. SoC-MOBINET courseware[M-1] High-Level Synthesis25 Force-Directed List Scheduling List Scheduling Force Directed Scheduling Resources given Time contraints given Minimize delay Minimize required resources If the problem is the other way around, ie. if the resources are given a Force-Directed List Scheduling algorithm can be applied.

26. SoC-MOBINET courseware[M-1] High-Level Synthesis26 Force-Directed List Scheduling The Force-Directed List Scheduling utilizes the strengths of the: Force-Directed Scheduling and List Scheduling Force-Directed List Scheduling is similar to List Scheduling except force is the priority function, not mobility.

27. SoC-MOBINET courseware[M-1] High-Level Synthesis27 Force-Directed List Scheduling List SchedulingForce-Directed List Scheduling We have 1 adder and 1 multiplier Mobility is a poor metric Force is a better metric

28. SoC-MOBINET courseware[M-1] High-Level Synthesis28 Results Test Application : Fifth-order Elliptic Wave Filter x p is a pipelined multiplier Many optimal results, depending on the application One result, ASAP is not optimal.

29. SoC-MOBINET courseware[M-1] High-Level Synthesis29 Results – The Design Space The Force-Directed List Scheduling gives better means for exploring the design space. It offers many results and depending on the application the designer can choose to use more or less resources and see what implications it will have on the delay.

30. SoC-MOBINET courseware[M-1] High-Level Synthesis30 One more optimization The Force-Directed List Scheduling is implemented in a system called HAL. HAL also uses techniques called register merging and multiplexer merging. These techniques minimizes the cost on registers and interconnections.

31. SoC-MOBINET courseware[M-1] High-Level Synthesis31 Results Comparison on various syntesis tools normalized to HAL86 Test Application : Differential Equation Non-pipelined Multiplier Pipelined Multiplier

32. SoC-MOBINET courseware[M-1] High-Level Synthesis32 Results Physical unit and interconnection requirements Test Application : Wave Filter

33. SoC-MOBINET courseware[M-1] High-Level Synthesis33 Conclussions The Force-Directed Scheduling and Force-Directed List Scheduling algorithms allows the designer to explore the design space. By taking into account the cost of interconnection, registers and multiplexers a more precise algorithm is realized. The HAL system, using these algorithms, shows promising results compared to other systems.