1. 9/21/04ELEC 5970-003/6970-003 Class Projects 1 ELEC5970-003/6970-003/Fall 2004 Advanced Topics in Electrical Engineering Designing VLSI for Low-Power and Self-Test Class Projects and Presentations Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and Computer Engineering Auburn University http://www.eng.auburn.edu/~vagrawal vagrawal@eng.auburn.edu

2. 9/21/04ELEC 5970-003/6970-003 Class Projects 2 Student Evalulation Homework (30%) – three Student presentation (10%) Research paper (30-60%) – a publishable paper will exempt the student from the final exam Final Exam (0-30%)

3. 9/21/04ELEC 5970-003/6970-003 Class Projects 3 Project 1: Mixed-Signal BIST Select an analog function in a mixed- signal environment. Develop a specification-based test procedure. Design a digital TPG and an ORA with measurable output. Analyze ORA for tolerance characteristic and aliasing.

4. 9/21/04ELEC 5970-003/6970-003 Class Projects 4 Analog Circuit AnalogSystem Inputs ADC System FunctionDigitalSystem Outputs Analog System Outputs System Function Digital System Inputs Digital Circuitry DAC Analog Circuitry Analog Circuit Mixed-Signal BIST – Stroud, Dai ORA TP G Test Control Mux Analog MUX BIST Done BIST Start Pass/Fail 101011000111011010 101011000111011010 Digital circuitry tests analog circuitry –Minimum overhead & impact to analog circuitry Capable of automatic measurement: gain, linearity Developed parameterized HDL models –Automatic synthesis in any mixed-signal system

5. 9/21/04ELEC 5970-003/6970-003 Class Projects 5 Reference F. Dai, C. Stroud, D. Yang and S. Qi, “Automatic Linearity (IP3) Test with Built-In Pattern Generator and Analyzer,” Proc. International Test Conference, October 2004. M. Burns and G. W. Roberts, An Introduction to Mixed-Signal IC Test and Measurement, New York: Oxford University Press, 2001.

6. 9/21/04ELEC 5970-003/6970-003 Class Projects 6 Project 2: Spectral BIST Develop TPG and ORA circuits for testing of digital circuits. Analyze overhead, coverage and aliasing.

7. 9/21/04ELEC 5970-003/6970-003 Class Projects 7 Spectral Testing Main ideas: –Meaningful inputs (e.g., test vectors) of a circuit are not random. –Input signals have spectral characteristics that are different from white noise (random vectors).

8. 9/21/04ELEC 5970-003/6970-003 Class Projects 8 Statistics of Test Vectors b c a a 00011 b 01100 c 10101 100% coverage Tests: Test vectors are not random: 1.Correlation: a = b frequently used. 2.Weighting: c has more 1s than a or b.

9. 9/21/04ELEC 5970-003/6970-003 Class Projects 9 Spectral Test Generation Initial vectors (random) Fault simulation and vector- compaction Fault coverage ? Compute spectral coefficients Add filtered vectors to test set Stop low ok (Hadamard Functions)

10. 9/21/04ELEC 5970-003/6970-003 Class Projects 10 Spectral ATPG Det vec CPU s 3643 734 44 1645 4464 24 Spectral Test Results Strategate Det vec CPU s 3639 11571 2268 1488 33113 9659 HITEC Det vec CPU s 3231 912 1104 - - - Circuit name s5378 b12 CPU: Ultra Sparc 10 HITEC: Nierman and Patel, EDAC’91 Strategate: Hsiao et al., ACMTDAES’00

11. 9/21/04ELEC 5970-003/6970-003 Class Projects 11 Reference A. Giani, S. Sheng, M. S. Hsiao, and V. D. Agrawal, “Novel Spectral Methods for Built-In Self-Test in a System-on-a-Chip Environment,” Proc. 19 th IEEE VLSI Test Symp., 2001, pp. 163-168.

12. 9/21/04ELEC 5970-003/6970-003 Class Projects 12 Project 3: Low-Power Adiabatic Logic Basic Idea – If we charge a capacitor C to voltage V in n equal increments, then the energy required by each increment is C(V/n) 2 = (1/n 2 ) CV 2 The total energy of n-step charging is 1/n of that required to charge the capacitor to the full voltage V in one step.

13. 9/21/04ELEC 5970-003/6970-003 Class Projects 13 Adiabatic CMOS Circuits Low-Power circuits have been designed with time-varying (periodic) power supply. The objective is to analyze: –Effect of the shape (sinusoidal, triangular, etc.) of the power supply waveform on power dissipation. –Effect of the supply frequency on delay and power of the circuit. –Possibly treat supply as AC instead of DC.

14. 9/21/04ELEC 5970-003/6970-003 Class Projects 14 Related Ideas for Investigation Energy recovery Reversible Logic V DD

15. 9/21/04ELEC 5970-003/6970-003 Class Projects 15 Reference Y. Ye and K. Roy, “QSERL: Quasi-Static Energy Recovery Logic,” IEEE J. Solid State Circuits, vol. 36, no. 2, pp. 239-248, Feb. 2001.

16. 9/21/04ELEC 5970-003/6970-003 Class Projects 16 Project 4: Submicron Leakage Power Reduction Recent references.

17. 9/21/04ELEC 5970-003/6970-003 Class Projects 17 Project 5: ISA for Low Power Recent references.

18. 9/21/04ELEC 5970-003/6970-003 Class Projects 18 Project 6: Power Estimation Algorithms Mixed-levels of hierarchy Glitch, leakage and short-circuit power Recent references