1. Betsy Natter Instructor Phone: 503.725.9042 Fax: 503.725.3807 Email: natterb@pdx.edu Education M.S. 1998, Electrical Engineering, Oregon Graduate Institute B.S. 1986, Physics, California Institute of Technology/Caltech Research Interests Microelectronics: Semiconductor device fabrication, optimization, and parameter extraction. Microelectronics, Nanoelectronics and Electromagnetics Dr. Branimir Pejcinovic, Dr. Melinda Holtzman and Betsy Natter P.K. Wong, B. Pejcinovic, J.J. Lee, and S.T. Hsu, ``Characterization and Comparison of SOI and Strained-SOI N- MOSFETs,'' Solid-State Electronics, in preparation. E. Sijercic, K. Mueller and B. Pejcinovic ``Simulation of InSb Devices Using Drift-Diffusion Equations,'' Solid-State Electronics, vol. 49, pp.1414-1421, August 2005. O. Woywode and B. Pejcinovic, ``Nonlinear Second Order Current Cancelation in HBTs,'' Solid-State Electronics, vol. 41, no. 9, pp. 1321--1328, 1997. M. Persun, B. Pejcinovic and S. Zhou, ``Design of Si and SiGe p-Channel SOI MOSFET,'' Solid-State Electronics, vol. 41, no. 5, pp. 761--769, 1997. B. Pejcinovic, H.K. Tang, J.L. Egley, L.R. Logan, and G.R. Srinivasan, ``Two-dimensional tensor temperature extension of the hydrodynamic model and its application,'' IEEE Trans. Electron Devices, vol. 42, no. 12, pp. 2147--2155, 1995. B. Pejcinovic, T.-W. Tang, S.-C. Lee, and D.H. Navon, ``A Numerical Study of Performance Potential of Si_{1-x}Ge_{x} Pseudomorphic Heterojunction Bipolar Transistors,'' IEEE Trans. Electron Devices, vol. 39, no. 9, pp. 2021-2027, 1992. B. Pejcinovic, L.E. Kay, T.-W. Tang, and D.H. Navon, ``Numerical Simulation and Comparison of Si BJTs and Si_{1- x}Ge_{x} HBTs,'' IEEE Trans. Electron Devices, vol. 36, no, 10, pp. 2129-2137, 1989. B. Pejcinovic, T.-W. Tang, and D.H. Navon, ``High-Frequency Characterization of Heterojunction Bipolar Transistors Using Numerical Simulation,'' {\em IEEE Trans. Electron Devices,} vol. 36, no. 2, pp. 233-239, 1989. Selected Publications M.B. Tayahi, B. Johnson, M. Holtzman, G. Cadet, "Piezoelectric Materials for Powering Remote Sensors," IEEE-IPCCC-2005, Phoenix, AZ, 2005. M.J. Holtzman, B.P. Johnson, L. Lautzenhiser, "A Digital Integrator for an S-band High-Speed Frequency-Hopping Phase- Locked Loop," Proc. 39th Annual International Telemetering Conf., Las Vegas, NV, 2003. M.J. Holtzman, M.S. Fadali, B.P.Johnson, L. Lautzenhiser, "Robust Stability Analysis of a Phase-Locked Loop Voltage- Controlled Oscillator Circuit," Proc. American Control Conf., San Diego, CA, 1999. B.P. Johnson, B.A. Lautzenhiser, M.J. Holtzman, L. Lautzenhiser, "Overcoming Traditional High Frequency Phase-Locked Loop Synthesizer Limitations," Proc. 7th International Symposium on Recent Advances in Microwave Technology, Malaga, Spain, 1999. P.K. Wong, B. Pejcinovic, J.J. Lee, S.T. Hsu, "Microwave Testing and Characterization of Strained Silicon SOI Technology," IEEE Int. Mixed-Signals Testing Workshop, 2004. H. Xiao, R. Schaumann, W.R. Daasch, P.K. Wong, B. Pejcinovic, "A Radio-Frequency CMOS Active Inductor and Its Application in Designing High-Q Filters," Proc. IEEE Int. Symposium on Circuits and Systems, 2004. V. Ceperic, A. Baric, B. Pejcinovic, "Artificial Neural Network in Modeling of Voltage Controlled Oscillators With Jitter," Proc. IEEE MELECON, 2004. E. Sijercic, K. Mueller, B. Pejcinovic, "Simulation of the Exclusion/Extraction InSb MOSFETs," IEEE Workshop on Microelectronics and Electron Devices, 2004. J. Castelino, P. Wong, E. Sijercic, B. Pejcinovic, A. Baric, "Comparison of non-linear MESFET models over 1-12 GHz range," IEEE ICECS, 2003. Betsy Natter is enthusiastic about teaching undergraduate design classes