1. 1 Rainer Leupers, University of Dortmund, Computer Science Dept. ISSS ´98 HDL-based Modeling of Embedded Processor Behavior for Ret. Compilation Rainer Leupers University of Dortmund, Germany Dept. of Computer Science 12

2. 2 Rainer Leupers, University of Dortmund, Computer Science Dept. ISSS ´98 Retargetable compilation Retargetable Compiler Standard Compiler processor model processor model compiler mainly manual process processor model processor model compiler mainly automatic process

3. 3 Rainer Leupers, University of Dortmund, Computer Science Dept. ISSS ´98 Advantages of HDL-based processor modeling > easy to accomodate architectural changes > familiar to HW designers > flexible modeling of instruction-level parallelism > supports different abstraction levels: RTL models I/S models > single model for different design tasks: synthesis simulation code generation Example application: TI TMS320C25 model used in RECORD