1. Physical States for Bits

2. Black Box Representations

3. Truth Tables

4. Basic Logic Gates

5. NAND and NOR gates

6. Sum of Products Circuits

7. Timing Diagrams

8. Logic Levels for CMOS

9. The concept of voltage- controlled resistance

10. nMOS transistor

11. pMOS transistor

12. Now we put together nMOS and pMOS transistors to create an inverter

13. Switch Model for CMOS inverter

14. Logical operation of CMOS inverter

15. Explanation of 2-input CMOS NAND gate

16. Switch Model for NAND realized in CMOS

17. Explanation of CMOS NOR

18. CMOS NAND with 3 inputs

19. Example of realization of large NAND gates in CMOS

20. Buffers realized in CMOS

21. AND gate in CMOS

22. AND-OR-INVERT gate in CMOS

24. CMOS OR-AND-INVERT

26. Data Sheets and how to use them

27. Test Circuits and Waveforms

28. Input-Output Characteristics

29. Logic Levels and Noise Margins for CMOS logic family

30. Resistive Models of Inverters

31. Resistive model for CMOS LOW output with resistive load

32. Black Box Representations Resistive model for CMOS HIGH output with resistive load

33. Circuit defintions to calculate currents

34. Output loading specifications

35. Estimating sink and source currents

36. CMOS inverters with nonideal input voltages

37. Black Box Representations CMOS inverter with load and nonideal 1.5 voltage input

38. Black Box Representations CMOS inverter with load and nonideal 3.5 voltage input

39. What to do with non-used inputs?

40. Transition times

41. How to analyze transition times for CMOS output?

42. Model of HIGH-to-LOW transition

43. Black Box Representations