1. Lucas-Lehmer Primality Tester Presentation 5 February 22, 2006 Team: W-4 Nathan Stohs W4-1 Brian Johnson W4-2 Joe Hurley W4-3 Marques Johnson W4-4 Design Manager: Prateek Goenka Overall Objective: Modular Arithmetic unit with a creative use This is my presentation, there are others like it but this one is mine

2. Status Finished –Project Chosen –C simulations –Behavioral Verilog –Structural Verilog –Revised Floor Plan –Schematics ( 95%) In Progress –Simulation of Schematics To Do –Simulations –Layout

3. Highlights of the Week Working on top level schematics and simulations, top-level is currently blocked by a single module. Minor verilog revisions and testing, not yet incorporated into schematics. Mostly removing logic. Power testing of modules that are available, considering alternatives.

4. Design Decisions Current Implementation: –Power usage a little high –Log shifters have to go, expensive –Many easy optimizations to do before moving on Future: –Possible Alternative adders and shifters. –Final constraints for p need to be set –Expose mod unit for alternative uses –No extra functionality, but exposing mod unit beyond “built-in” application would be good.

5. Log Shifter Issues Overkill, expensive, not necessary, pointless for our design goals. Large area, many transistors, very power hungry. Good for speed, but not for us. A single instance in our tests consumed 140.4uW, many instances needed, good place to start worrying about power. One of the few modules we can be flexible with.

6. Shifter Schematic

7. Simulation of Mod Add x=68, y=128 P=7, mod by 127 x+y = 196 196 mod 127 = 69

8. Schematic for Mod Add

9. What we have completed Moduleschematicsimulation RegistersyesYes mod calcyesYes counteryesYes compareyesYes check zeroyesYes fsmnoNo top levelnoNo partial productyesNo mod addyesYes sub 2yes

10. Transistor Counts and Power ModuleTransistor Count / Power FSM300 Mod Calc2440 Counter1656 / 53.81uW Mod Multiply15302 / ? mod add unit128.8uW shifters140.4uW each Registers1848 Compare for zero92 Total21638

11. Block Area Estimates ModuleArea (μm 2 ) FSM900 Mod Calc3500 Counter6000 Mod Multiply75000 Registers3000 Compare for zero300 Total88300

12. Floorplan

13. What’s Next Alternate uses for mod unit Improve verilog, add to schematic Optimize, optimize –New adders, shifters, logic reduction, low- power Power testing of possible alternative components Finish the schematic Do the layout

14. Questions?