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1HW1 Explain the transition “interrupted” and “event wait.” Describe how they are different. NewReadyRunningTerminated Waiting (Blocked) admitted Dispatched to a CPU interrupted I/O or event wait I/O or event completion exit
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2HW2 CPU Ready Queue admitted dispatched exit interrupted Event 1 wait Event 1 occurs Event 1 Blocked Queue Event 2 wait Event 2 Blocked Queue Event 3 wait Event 2 occurs Event 3 occurs This process mgt scheme assumes that each process waits for an event. A process may want to wait for multiple events at the same time. When can this make sense? Provide an example. How do you design process queues?
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3HW3 Choose an OS, and describe –Where the OS places virtual memory –How to configure (change) the total size of virtual memory on the OS.
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4HW4 For the 7-state process behavior model –Draw a queuing diagram.
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