1. Combinational Logic Discussion D2.5

2. Combinational Logic Combinational Logic inputsoutputs Outputs depend only on the current inputs

3. Sample Combinational Circuit

4. From circuit to truth table

5. From truth table to circuit

6. No reduction With reduction abcxy 00010 00100 01011 01110 10001 10111 11010 11100 Using K-maps to reduce Direct implementation

7. 2-variable 3-variable 4-variable Recall… Karnaugh Maps for logic reduction

10. Ummmm, NO. Let the software minimize for you…

12. BCD 7-Segment Decoder

13. BCD 7-Segment Decoder – K-map for ‘a’

14. BCD 7-Segment Decoder All signals: a, b, c, d, e, f, g

15. Structural VHDL for the BCD to 7-seg Decoder

17. DECLARING THE COMPONENTS THAT YOU WILL USE

18. Structural VHDL for the BCD to 7-seg Decoder WIRE IT UP

19. Structural VHDL for the BCD to 7-seg Decoder OR… AN EASIER WAY USING GATES FROM THE 1164 STANDARD LIBRARY (STILL STRUCTURAL)

20. Structural VHDL for the BCD to 7-seg Decoder OR… EVEN EASIER YET A BEHAVIORAL DESCRIPTION