1. Multiplexers Module M6.1 Section 6.4

2. Multiplexers A 4-to-1 MUX TTL Multiplexer A 2-to-1 MUX

3. Multiplexers Y 4 x 1 MUX s0s1 C0 C1 C2 C3 Y s1s0 0 0 C0 0 1 C1 1 0 C2 1 1 C3

4. Multiplexers Y 4 x 1 MUX s0s1 C0 C1 C2 C3 Y s1s0 0 0 C0 0 1 C1 1 0 C2 1 1 C3 0 A multiplexer is a digital switch

5. Multiplexers Y 4 x 1 MUX s0s1 C0 C1 C2 C3 Y s1s0 0 0 C0 0 1 C1 1 0 C2 1 1 C3 0 1

6. Multiplexers Y 4 x 1 MUX s0s1 C0 C1 C2 C3 Y s1s0 0 0 C0 0 1 C1 1 0 C2 1 1 C3 1 0

7. Multiplexers Y 4 x 1 MUX s0s1 C0 C1 C2 C3 Y s1s0 0 0 C0 0 1 C1 1 0 C2 1 1 C3 1

8. Multiplexers Y 4 x 1 MUX s0s1 C0 C1 C2 C3 Y s1s0 0 0 C0 0 1 C1 1 0 C2 1 1 C3 Y = C0 & !S1 & !S0 # C1 & !S1 & S0 # C2 & S1 & !S0 # C3 & S1 & S0

9. TTL Multiplexer 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 GND Vcc1G B 1C3 1C2 1C1 1C0 1Y 2G A 2C3 2C2 2C1 2C0 2Y 74LS153 X X X X X X 1 0 0 0 0 X X X 0 0 0 0 1 X X X 0 1 0 1 X 0 X X 0 0 0 1 X 1 X X 0 1 1 0 X X 0 X 0 0 1 0 X X 1 X 0 1 1 1 X X X 0 0 0 1 1 X X X 1 0 1 B A C0 C1 C2 C3 G Y Dual 4-to-1-line multiplexer

10. Y S 0 A0 1 B0 A 2-to-1 MUX 2 x 1 MUX S Y = A0 & !S # B0 & S A0 B0 Y

11. Y S 0 A 1 B Problem How would you make a Quad 2-to-1 MUX? S [A3..0] [B3..0] [Y3..0] Quad 2-to-1 MUX

12. mux.abl MODULE Mux TITLE 'Quad 2 to 1 Multiplexer, A. Student, 6/21/02' DECLARATIONS " INPUT PINS “ " OUTPUT PINS “ EQUATIONS END Mux S [A3..0] [B3..0] [Y3..0] Quad 2-to-1 MUX

13. mux.abl MODULE Mux TITLE 'Quad 2 to 1 Multiplexer, A. Student, 6/21/02' DECLARATIONS " INPUT PINS " X3..X0 PIN 6,7,11,5; X = [X3..X0]; Y3..Y0 PIN 72,71,66,70; Y = [Y3..Y0]; S PIN 10; Switch 1..4 X input vector (4 bits) Switch 5..8 Y input vector (4 bits) Push Button Select Line

14. mux.abl (cont’d) " OUTPUT PINS " Z3..Z0 PIN 39,37,36,35 ISTYPE 'com'; Z = [Z3..Z0]; EQUATIONS Z = X & !S # Y & S; END Mux Output LEDs 5 – 8 Output Vector Z (4 bits) Logic Equation for the Multiplexer Defines output