1. From Compaq, ASP- DAC00

2. Power Consumption Power consumption is on the rise due to: - Higher integration levels (more devices & wires) - Rising clock frequencies - Leakage current becomes appreciable with small V t ’s How does interconnect fit in? Longer total wirelength contributes to additional wiring capacitance - NTRS 97 predicts total wirelength of 5 km in 0.1  m

3. Simplified power analysis Look at scaling of each component of dynamic power (within a block of gates) Frequency scales up as 1/S (S ~ 0.7 for a typical process shrink) Voltage decreases ~ S Capacitance drops as S Device -- Junction scales as S (perimeter term dominant) Oxide capacitance scales as S 2 /S = S Wire -- Pitch ~ S Block Size ~ S 2 Total wirelength ~ Block Size / Pitch = S Normalized to block size, this represents a constant power density This analysis makes many approximations yet arrives at a similar conclusion to a more complex analysis (Sylvester, ICCAD 98) CV 2 f = S*S 2 *(1/S) = S 2

4. Power Analysis: Global Interconnect 50,000 Gate Module Global Pin Global Net Assume buffering of all global wires N buffer is estimated by L total / L crit Number of global nets is determined using Rent’s Rule to calculate # of global pins, and convert to nets p global ~ 0.45 to 0.55 (or p local - 0.1)

5. BACPAC Results: Microprocessor Power could be limiting factor at sub-0.1  m Amount of memory greatly impacts total power dissipation (70% assumed here)

6. Power Distribution: IR Drop Grid structure yields low IR drops but wirebonding constrains power to be supplied from chip periphery Middle of die sees large IR drops due to D c /2 maximum wirelength Top layer voltage drop is given by: With flip-chip, worst-case resistive path drops from D c /2 to P bump (bump pad pitch, ~ 200  m) I top D c /2 P bump Compared to IBM S/390 (flip-chip), expression (max) = 32 mV, experiment (avg) = 23 mV

7. Leakage Power Leakage can be calculated based on the following expression For V t < 0.2V, leakage becomes significant SOI - reduces 95 mV to ~60 mV Source: Intel, DAC98

8. Short-Circuit Power V tn < V in < V dd - |V tp | I peak t base BACPAC results indicate that short-circuit power is ~ 10-15% of dynamic power (excluding clock, memory, I/O) Extend Veendrick’s method by using Alpha-power law to find peak current

9. Technology Trends: Power Distribution Despite dropping power supplies Rise in power – large supply currents drawn Larger chips and smaller wires – IR drop Ref: Compaq, ASP-DAC00

10. NiCd energy capacity: 10 - 22 W-hrs/lb. Where are we headed ? Battery weight, size & lifetime Cost & sophistication of heat removal Device reliability Ref: Meindl

11. SIA Projections on V dd Scaling Ref: Meindl