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Independence Fault Collapsing
Alok S. Doshi (Speaker) Vishwani D. Agrawal Auburn University, Department of Electrical and Computer Engineering Auburn, AL 36849, USA Aug.13, 2005 VDAT05: Doshi and Agrawal
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Outline Motivation Fault Classification Independence Graph and Matrix Independence Fault Collapsing Concurrent Test Generation Conclusions and Future Work Aug.13, 2005 VDAT05: Doshi and Agrawal
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C17 - ISCAS85 Benchmark Circuit
Motivation ATPG Tests Hitec1 10 Fastest2 7 Gentest3 a x b c y d e C17 - ISCAS85 Benchmark Circuit Minimum 4 1 T. M. Niermann and J. H. Patel, “HITEC: A Test Generation Package for Sequential Circuits,” Proc. European Design Automation Conference, Feb. 1991, pp 2 T. P. Kelsey, K. K. Saluja, and S. Y. Lee, “An Efficient Algorithm for Sequential Circuit Test Generation,” IEEE Trans. Computers, vol. 42, no. 11, pp , Nov 3 W. T. Cheng and T. J. Chakraborty, “Gentest: An Automatic Test Generation System for Sequential Circuits,” Computer, vol. 22, no. 4, pp. 43–49, April 1989. Aug.13, 2005 VDAT05: Doshi and Agrawal
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Fault Classification Aug.13, 2005 VDAT05: Doshi and Agrawal
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Definitions Independent Faults4: Two faults are independent if and only if they cannot be detected by the same test vector. Concurrently-Testable Faults: Two faults that neither have a dominance relationship nor are independent, are defined as concurrently-testable faults. 4 S. B. Akers, C. Joseph, and B. Krishnamurthy, “On the role of Independent Fault Sets in the Generation of Minimal Test Sets,” in Proc. International Test Conf., 1987, pp Aug.13, 2005 VDAT05: Doshi and Agrawal
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Structural Independences
sa1 sa1 sa0 sa1 sa1 sa0 sa1 sa1 sa1 sa0 sa0 sa0 sa1 sa0 sa1 sa0 sa0 sa0 sa1 sa0 Aug.13, 2005 VDAT05: Doshi and Agrawal
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Implied Independences
Equivalence implied independence: If two faults are equivalent then all faults that are independent of one fault are also independent of the other fault. Dominance implied independence: If one fault dominates a second fault then all faults that are independent of the first fault are also independent of the second fault. Aug.13, 2005 VDAT05: Doshi and Agrawal
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Functional Independences
Aug.13, 2005 VDAT05: Doshi and Agrawal
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C17 - ISCAS85 Benchmark Circuit
Example Circuit 2-1 4-1 a x 5-1 1-1 b 3-1 7-1 c 11-1 y d 6-1 10-1 9-1 e 8-1 C17 - ISCAS85 Benchmark Circuit 5 R. K. K. R. Sandireddy and V. D. Agrawal, “Diagnostic and Detection Fault Collapsing for Multiple Output Circuits," in Proc. Design, Automation and Test in Europe (DATE) Conf., Mar. 2005, pp Aug.13, 2005 VDAT05: Doshi and Agrawal
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Independence Matrix and Graph
F 1 2 3 4 5 6 7 8 9 10 11 Aug.13, 2005 VDAT05: Doshi and Agrawal
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Clique A clique is defined as a fully-connected subgraph, i.e., a subgraph in which every node is connected to every other node. A lower bound on the number of tests required to cover all faults of an irredundant combinational circuit is given by the size of the largest clique of the independence graph. Aug.13, 2005 VDAT05: Doshi and Agrawal
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Cliques Aug.13, 2005 VDAT05: Doshi and Agrawal
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Degree of Independence
This is the number of edges attached to the fault node and is computed for the ith fault by adding all the elements of either the ith row or the ith column of the independence matrix. DI (ith fault) = Σ xij = Σ xji N N j=1 i=1 Aug.13, 2005 VDAT05: Doshi and Agrawal
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Degree of Independence
Fault 1 2 3 4 5 6 7 8 9 10 11 DI Aug.13, 2005 VDAT05: Doshi and Agrawal
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Similarity Metric Similarity Metric: This is a measure defined for a pair of faults that determines how similar they are in their independence and concurrent-testability with respect to the entire fault set of the circuit. SIM (fault-i, fault-j) = Nxij + (1-xij) Σ |xik-xjk| N k=1 Aug.13, 2005 VDAT05: Doshi and Agrawal
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Similarity Metrics Fault 1 2 3 4 5 6 7 8 9 10 11 Aug.13, 2005 VDAT05: Doshi and Agrawal
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Independence Collapsing
Fault 1 3 5 8 9 11 7 2 4 6 10 DI Aug.13, 2005 VDAT05: Doshi and Agrawal
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Independence Collapsing
F 1 3 5 8 9 11 7 2 4 6 10 11 4 11 3 1,8 1 5,11,7 5,11 5 3,9,2 3,9 3 4,6,10 4,6 4 11 4 6 Similarity index for fault F for each existing node i: Max. SIM (F, kth fault of node i) where k = 1…..K, and K is number of faults in node i. Aug.13, 2005 VDAT05: Doshi and Agrawal
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Concurrent test generation for C17
2-1 4-1 a x 5-1 1-1 b 3-1 7-1 c 11-1 y d 6-1 10-1 9-1 Fault Targets Test (a b c d e) 1,8 10010 3,9,2 01111 5,11,7 X1010 4,6,10 10101 e 8-1 Aug.13, 2005 VDAT05: Doshi and Agrawal
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Results (ALU – 74181) Node Number of faults Test vectors no. Total Targeted Detected from Cumulative this node other nodes coverage 1 5 6 11 2 3 16 8 7 26 4 32 101x 39 47 54 14 66 9 72 10 77 1x 81 12 84 1x Aug.13, 2005 VDAT05: Doshi and Agrawal
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Conclusions and Future Work
Faults are reclassified into four classes: Equivalent Dominant Independent Concurrently-testable (also called compatible in the literature) A new fault collapsing algorithm based on Independent Faults is introduced. This algorithm frequently collapses the graph into a minimal clique. This work motivates the need for ATPG algorithms for concurrent fault targets. The problem of completely determining all edges of the independence graph is complex. The algorithm needs to be extended for incompletely – specified independence graph. Aug.13, 2005 VDAT05: Doshi and Agrawal
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Thank You! Aug.13, 2005 VDAT05: Doshi and Agrawal
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