1. Computation Engines: BDDs and SAT (part 2) 290N: The Unknown Component Problem Lecture 8

2. Outline  Characteristic function Representation of MV relations, automata, and FSMs Representation of MV relations, automata, and FSMs  Case study: Equivalence checking Combinational and sequential Combinational and sequential BDDs vs SAT BDDs vs SAT Combining the two Combining the two  Other representations Truth table Truth table Sums-of-products (SOPs) Sums-of-products (SOPs) Historical perspective Historical perspective

3. Characteristic Function  Definition  Manipulation of sets  MV relations as sets of I/O combinations  Examples representing an FSM representing an FSM representing an automaton representing an automaton

4. Characteristic Function  Boolean function F: {0,1} n  {0,1} represents a set S F of minterms x  {0,1} n, such that F(x)=1  Conversely, elements of any set S can be encoded using minterms x  {0,1} n and represented by a Boolean function, which takes value 1 in these minterms, and 0 otherwise.  This Boolean function is called characteristic function of the set S.  s : {0,1} n  {0,1}, such that  s (x) = 1  s : {0,1} n  {0,1}, such that  s (x) = 1 iff x represents some element s  S. iff x represents some element s  S. the codes should be disjoint for all elements of S the codes should be disjoint for all elements of S the size of Boolean space of x cannot be smaller than n=  log 2 |S|  the size of Boolean space of x cannot be smaller than n=  log 2 |S| 

5. Set Manipulation Operations on sets are reduced to Boolean operations on the characteristic functions: Empty set:   = 0 Union of sets:  S  T =  S +  T Intersection of sets:  S  T =  S &  T Set different:  S - T =  S &  T ’ Containment of sets: (  S   T ) = 1

6. Multi-Valued Relations where are finite sets of values. The variables are multi-valued variables which can take on any value in if R is binary and the are treated as outputs. is an MV relation, is a multi-output MV relation This relation is between a vector of inputs and a vector of outputs:

7. 0 0 0 Normal Simulation (NS) fanins POs node with a non-deterministic relation 3 1 1 2 2 2 {0,2}2 PI/PO relation contains 3 1 1 / 2 1 0 2 1 0 0 0 1 2

8. Relations as Sets of I/O Combinations  As sets, relations can be represented and manipulated using their characteristic functions  One way of encoding the I/O combinations belonging to a relation, is to encode each variable and then to combine the individual variable codes into a single code of a combination  For example, in the previous example, assuming all the variables to be 4-valued and natural binary encoding: Combinations: 3 1 1 / 2 1 0 3 1 1 / 0 1 2 Codes: 11 01 01 / 10 01 00 11 01 01 / 00 01 10

9. Relations Representing an FSM  FSM is { I, O, S, S 0, , }  Transition relation is T(i, s, s’) : I  S  S  {0,1} T(i, s, s’) : I  S  S  {0,1} T(i, s, s’) = 1 iff state s’ is reached in one transition from state s under input i T(i, s, s’) = 1 iff state s’ is reached in one transition from state s under input i  Output relation is F(i, s, o): I  S  O  {0,1} F(i, s, o): I  S  O  {0,1} F(i, s, o) = 1 iff output o is produced in state s under input i F(i, s, o) = 1 iff output o is produced in state s under input i  Total transition/output relation of the FSM is TF(i, s, s’, o): I  S  S  O  {0,1} TF(i, s, s’, o): I  S  S  O  {0,1} TF(i, s, s’, o) = 1 iff state s’ and output o can be produced in state s under input i TF(i, s, s’, o) = 1 iff state s’ and output o can be produced in state s under input i

10. Example of an FSM DFF xy 0 1 00 10 11 01.i 2.o 0.s 2.p 4.ilb x y.ob.accepting 0 1.names x y cs ns 00 0 0 10 0 1 01 1 0 11 1 1.excsnsy0000 1010 1111 0101

11. Relation Representing an Automaton  Automaton is { I, S, S 0, , Q}  Transition relation is T(i, s, s’) : I  S  S  {0,1} T(i, s, s’) : I  S  S  {0,1} T(i, s, s’) = 1 iff state s’ is reached in one transition from state s under input i T(i, s, s’) = 1 iff state s’ is reached in one transition from state s under input i  Output relation (acceptance function) is F(s): S  {0,1} F(s): S  {0,1} F(s) = 1 iff state s is accepting F(s) = 1 iff state s is accepting

12. Example of an Automaton A B A B A B NS 01 01 10 10 00 00 code C C B B A A CS 001 100 001 100 000,1 100 codeIns C B A 0,1 0 1 0 1 0

13. Example (continued) Transition relation T(I,a 1,a 2,b 1,b 2 ) = i'a 1 ‘a 2 ‘b 1 b 2 ‘+ a 1 ‘a 2 'b 1 'b 2 ' + i'a 1 a 2 'b 1 b 2 ' + ia 1 a 2 'b 1 'b 2 ' + i'a 1 a 2 'b 1 b 2 ' + ia 1 a 2 'b 1 'b 2 ' i'a 1 ‘a 2 ‘b 1 b 2 ‘+ a 1 ‘a 2 'b 1 'b 2 ' + i'a 1 a 2 'b 1 b 2 ' + ia 1 a 2 'b 1 'b 2 ' + i'a 1 a 2 'b 1 b 2 ' + ia 1 a 2 'b 1 'b 2 ' i a1a1 b1b1 a2a2 b2b2 1 0

14. Case Study: Equivalence Checking  Combinational  Sequential  Equivalence checking as search  BDDs vs SAT  Combination of the two

15. Combinational Equivalence Checking  Given two combinational circuits, C1 and C2 Construct the Miter circuit Construct the Miter circuit The output of the Miter circuit is 1 iff the two circuits are differentThe output of the Miter circuit is 1 iff the two circuits are different Prove that the output of the Miter circuit is always 0 Prove that the output of the Miter circuit is always 0 C1 C2 a b a b c O1O1 c O2O2 O

16. Sequential Equivalence Checking  Given two sequential circuits, C1 and C2 Construct the product circuit (FSM) Construct the product circuit (FSM) The output of the product is 1 iff the two are differentThe output of the product is 1 iff the two are different Find the reachable states of the product circuit (FSM) Find the reachable states of the product circuit (FSM) If there exist a state with the output 1, they are not equivalent If there exist a state with the output 1, they are not equivalent M1 M2 a b a b c O1O1 c O2O2 O

17. Verification as Search  Verification problem is reduced to a search problem find an assignment of input variables (or a sequence of such assignments), which leads to a 1 at the output find an assignment of input variables (or a sequence of such assignments), which leads to a 1 at the output  If we finished exploring the search space and cannot find such an assignment, the circuits are equivalent

18. BDDs vs SAT for Search  BDD package  Builds the canonical representation of all branches up to a point  Tends to run out of memory  SAT solver  Explores one branch at a time  Tends to run out of time  Both exhaustively explore the search space

19. Search Problem

20. Different Ways of Exploring Search Space BDD approachSAT approach   

21. Combining BDDs and SAT  Build the BDDs for the nodes until the size reaches a limit  Use SAT to prove equivalence of pairs of cut-points using a timeout  Iterate the above two steps, while increasing the size limit and the timeout until the problem is solved  BDDs and SAT attack the problem using their comlementary strengths in a balanced manner   A. Kuehlmann, V. Paruthi, F. Krohm, M. K. Ganai, “Robust Boolean reasoning for equivalence checking and functional property verification”, IEEE Trans. CAD, Vol. 21, No. 12, Dec. 2002, pp. 1377-1394.

22. Other Representations  Truth table Implemented using bit strings Implemented using bit strings Convenient for functions up to 5 variables Convenient for functions up to 5 variables Useful for functions up to 8 variables Useful for functions up to 8 variables  Sums-of-products Cubes are represented in positional notation Cubes are represented in positional notation Implemented using bit strings Implemented using bit strings The main data structure to represent SOPs in Espresso and SIS The main data structure to represent SOPs in Espresso and SIS  Common features Are explicit in nature Are explicit in nature Exploit bit parallelism of modern computers Exploit bit parallelism of modern computers Have been traditionally used in many applications Have been traditionally used in many applications

23. Use of Functional Representations Historical Perspective Problem Size Time Period1950-1970198019902000 +CNF Truth table +SOP +BDD