1. Design and Implementation of VLSI Systems (EN1600) Lecture 26: Datapath Subsystems 2/4 Prof. Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison Wesley – Rabaey/Pearson]

2. Last lecture we designed a carry-ripple adder For a full adder, define what happens to carry –Generate: C out = 1 independent of C G = A B –Propagate: C out = C P = A  B –Kill: C out = 0 independent of C K = ~A ~B PG summary

3. Group carry calculations i j k k-1 The carry into bit i is the carry-out of bit i-1 The sum is equal to

4. Group generate i j k k-1

5. Carry-ripple adder revisited

6. The critical path now proceeds through a chain of AND-OR gates rather than a chain of majority gates

7. 8-bit adder/subtractor 1-bit FA S0S0 C 0 =C in C1C1 1-bit FA S1S1 C2C2 S2S2 C3C3 C 8 =C out 1-bit FA S7S7 C7C7... A0A0 B0B0 A1A1 B1B1 A2A2 B2B2 A7A7 B7B7 add/subt  Subtraction – complement all subtrahend bits (xor gates) and set the low order carry-in