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Introduction to CMOS VLSI Design Lecture 3: CMOS Transistor Theory David Harris Harvey Mudd College Spring 2004 from CMOS VLSI Design A Circuits and Systems Perspective (3rd Edition) Neil Weste and David Harris
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CMOS VLSI Design3: CMOS Transistor TheorySlide 2 Outline Introduction MOS Capacitor nMOS I-V Characteristics pMOS I-V Characteristics Gate and Diffusion Capacitance
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CMOS VLSI Design3: CMOS Transistor TheorySlide 3 Introduction So far, we have treated transistors as ideal switches An ON transistor passes a finite amount of current –Depends on terminal voltages –Derive current-voltage (I-V) relationships Transistor gate, source, drain all have capacitance –I = C ( V/ t) -> t = (C/I) V –Capacitance and current determine speed Also explore what a “degraded level” really means
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CMOS VLSI Design3: CMOS Transistor TheorySlide 4 MOS Capacitor Gate and body form MOS capacitor Operating modes –Accumulation –Depletion –Inversion
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CMOS VLSI Design3: CMOS Transistor TheorySlide 5 Terminal Voltages Mode of operation depends on V g, V d, V s –V gs = V g – V s –V gd = V g – V d –V ds = V d – V s = V gs - V gd Source and drain are symmetric diffusion terminals –By convention, source is terminal at lower voltage –Hence V ds 0 nMOS body is grounded. First assume source is 0 too. Three regions of operation –Cutoff –Linear –Saturation
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CMOS VLSI Design3: CMOS Transistor TheorySlide 6 nMOS Cutoff No channel I ds = 0
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CMOS VLSI Design3: CMOS Transistor TheorySlide 7 nMOS Linear Channel forms Current flows from d to s –e - from s to d I ds increases with V ds Similar to linear resistor
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CMOS VLSI Design3: CMOS Transistor TheorySlide 8 nMOS Saturation Channel pinches off I ds independent of V ds We say current saturates Similar to current source
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CMOS VLSI Design3: CMOS Transistor TheorySlide 9 I-V Characteristics In Linear region, I ds depends on –How much charge is in the channel? –How fast is the charge moving?
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CMOS VLSI Design3: CMOS Transistor TheorySlide 10 Channel Charge MOS structure looks like parallel plate capacitor while operating in inversion –Gate – oxide – channel Q channel = CV C = C g = ox WL/t ox = C ox WL V = V gc – V t = (V gs – V ds /2) – V t C ox = ox / t ox
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CMOS VLSI Design3: CMOS Transistor TheorySlide 11 Carrier velocity Charge is carried by e- Carrier velocity v proportional to lateral E-field between source and drain v = E called mobility E = V ds /L Time for carrier to cross channel: –t = L / v
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CMOS VLSI Design3: CMOS Transistor TheorySlide 12 nMOS Linear I-V Now we know –How much charge Q channel is in the channel –How much time t each carrier takes to cross
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CMOS VLSI Design3: CMOS Transistor TheorySlide 13 nMOS Saturation I-V If V gd < V t, channel pinches off near drain –When V ds > V dsat = V gs – V t Now drain voltage no longer increases current
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CMOS VLSI Design3: CMOS Transistor TheorySlide 14 nMOS I-V Summary Shockley 1 st order transistor models
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CMOS VLSI Design3: CMOS Transistor TheorySlide 15 Example We will be using a 0.6 m process for your project –From AMI Semiconductor –t ox = 100 Å – = 350 cm 2 /V*s –V t = 0.7 V Plot I ds vs. V ds –V gs = 0, 1, 2, 3, 4, 5 –Use W/L = 4/2
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CMOS VLSI Design3: CMOS Transistor TheorySlide 16 pMOS I-V All dopings and voltages are inverted for pMOS Mobility p is determined by holes –Typically 2-3x lower than that of electrons n –120 cm 2 /V*s in AMI 0.6 m process Thus pMOS must be wider to provide same current
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