1. מבנה המחשב + מבוא למחשבים ספרתיים תרגול 5# Topics: 1.Encoders and decoders 2.Shifters

2. Lower bound for decoder (q4.1) –Given a decoder with n inputs (2 n out’s). Prove that: c(n) ≥  (2 n ) d(n) ≥  (log n) –We assume constant fan-in, and unbounded fan-out. –Claim: Each output is non-trivial, hence connected to a gate. –Proof: Assume otherwise, but by checking we see that: No output is constant. No output is connected directly to an input.

3. Lower bound for decoder (cont.) –From this claim we obtain a bound on the size since: The fan-in is constant. Each output is different, so it must be the output of a unique gate.

4. Lower bound for decoder (cont.) –The delay is proved using cone arguments. Examine the output[0]. In order to decide it, we must examine all n-bits. This is the key argument. But since the fan-in is constant, any function that depends on n-bits can be calculated using a cone of delay ≥ log(n). (A theorem proved in class).

5. Lower bound for encoder (q4.7) –Given a encoder with 2 n inputs (n out’s). Prove that: c(n) ≥  (2 n ) d(n) ≥  (n) –We assume constant fan-in, and unbounded fan-out.

6. Lower bound for encoder (cont.) –Claim: Each input but at most 1 is connected to a non-trivial gate. –Proof: Assume otherwise.  There exists 2 inputs (say s,t) not connected to a non-trivial gate. But no input is connected directly to an output.  Neither s nor t are connected to any (trivial or non-trivial) gate.  The output must be oblivious to s and t, and this is clearly not true. –From this claim we obtain a bound on the size since the fan-in is constant.

7. Lower bound for an encoder (cont.) –The delay is proved using cone arguments. Examine the output[0] bit. In order to decide it, we must examine either all even bits or all odd-bits. Assume otherwise, we may make two inputs that are the same for out[0], but yields different results.  cone(output[0]) contains at least 2 n-1 bits.  But since the fan-in is constant, delay ≥ log(2 n-1 ). (A theorem proved in class).

8. A monotone circuit implements a monotone function (q4.5) –A monotone circuit contains only monotone gates (no negations). –Claim: If f,g are boolean monotone function, then so is fg, i.e., x ≥ y  f(g(x)) ≥ f(g(y)). –Proof: Denote by z 1 = g(x) and z 2 = g(y).  z 1 ≥ z 2 because g is monotone.  f(z 1 ) ≥ f(z 2 ) because f is monotone as well. –From this claim we prove that a monotone circuit implements a monotone function.

9. A monotone circuit implements a monotone function (cont.) –Proof: By induction on the size of the circuit. Basis: circuit of size 1 must be monotone, since the one gate it contains is montone. Assumption: Any monotone circuit of size n implements a monotone function. Step: Examine an n+1 monotone circuit.

10. A monotone circuit implements a monotone function (cont.) There exists a topological order it can be evaluated with. Denote by f the function implemented by the first n gates, and by g the function of gate n+1. f is monotone due to the induction hypothesis. Using the claim we obtain fg is also monotone.

11. Correctness of encoder* (q4.4)

12. Correctness of encoder* (cont.) –Proof: By induction on n. Basis is trivial, Assumption: Assume encoder*(n-1) is correct. Step: There may be two cases, either the 1 is in y L, or it is in y R. In the first case, the output of the or is exactly y L. Hence we may: – Apply the induction hypothesis on out[0:n-2]. –Check that out[n-1] is 0 as required.

13. Correctness of encoder* (cont.) In the second case, the output of the or is exactly y R. Hence we may: –Notice that the value of out[0:n-2] is the same as if y R resides in the left part of the number. –Check that out[n-1] is 1 as required. –Apply the induction hypothesis on out[0:n-2].

14. Correctness of Barrel-shifter (q5.4)

15. Correctness of Barrel-shifter (cont.) –We assume each CLS box (shifter block) is correct, and we prove the correctness of the whole circuit. –Claim: For every x, shift a (shift b (x)) = shift b (shift a (x)). shift a (shift b (x)) = shift a+b (x). –Proof: Let j be any bit in the n-bit representation of x. We check to which output bit would j be moved to.

16. Correctness of Barrel-shifter (cont.) –For a cyclic shift of size c, we obtain that: j  mod(c+j,n). shift a (shift b (x)) is j  mod(a+mod(b+j,n),n) shift b (shift a (x)) is j  mod(b+mod(a+j,n),n) shift a+b (x) is j  mod(a+b+j,n) From the modulo properties all these numbers are the same. Moreover, this is a 1-1 function, and hence every in-bit moves to a different out.

17. Correctness of Barrel-shifter (cont.) –From the claim, we obtain: The correctness of the whole shifter. The order of the shifts is irrelevant, we may re-order the CLS boxes, and still get the correct answer.