1. Embedded Computer Systems Chapter5: Program design and analysis Eng. Husam Y. Alzaq Islamic University of Gaza 1 © 2010 Husam Alzaq Computers as Components

2. Program design and analysis zSoftware components. zRepresentations of programs. zAssembly and linking. 2 © 2010 Husam Alzaq Computers as Components

3. Software state machine zState machine keeps internal state as a variable, changes state based on inputs. zUses: ycontrol-dominated code; yreactive systems. 3 © 2010 Husam Alzaq Computers as Components

4. State machine example idle buzzerseated belted no seat/- seat/timer on no belt and no timer/- no belt/timer on belt/- belt/ buzzer off Belt/buzzer on no seat/- no seat/ buzzer off 4 © 2010 Husam Alzaq Computers as Components

5. C implementation #define IDLE 0 #define SEATED 1 #define BELTED 2 #define BUZZER 3 switch (state) { case IDLE: if (seat) { state = SEATED; timer_on = TRUE; } break; case SEATED: if (belt) state = BELTED; else if (timer) state = BUZZER; break; … } 5 © 2010 Husam Alzaq Computers as Components

6. Signal processing and circular buffer zCommonly used in signal processing: ynew data constantly arrives; yeach datum has a limited lifetime. zUse a circular buffer to hold the data stream. d1d2d3d4d5d6d7 time ttime t+1 6 © 2010 Husam Alzaq Computers as Components

7. Circular buffer x1x2x3x4x5x6 t1t1 t2t2 t3t3 Data stream x1x2x3x4 Circular buffer x5x6x7 7 © 2010 Husam Alzaq Computers as Components

8. Circular buffers zIndexes locate currently used data, current input data: d1 d2 d3 d4 time t1 use input d5 d2 d3 d4 time t1+1 use input 8 © 2010 Husam Alzaq Computers as Components

9. Circular buffer implementation: FIR filter int circ_buffer[N], circ_buffer_head = 0; int c[N]; /* coefficients */ … int ibuf, ic; for (f=0, ibuff=circ_buff_head, ic=0; ic<N; ibuff=(ibuff==N-1?0:ibuff++), ic++) f = f + c[ic]*circ_buffer[ibuf]; 9 © 2010 Husam Alzaq Computers as Components

10. Queues zElastic buffer: holds data that arrives irregularly. 10 © 2010 Husam Alzaq Computers as Components

11. Buffer-based queues #define Q_SIZE 32 #define Q_MAX (Q_SIZE-1) int q[Q_MAX], head, tail; void initialize_queue() { head = tail = 0; } void enqueue(int val) { if (((tail+1)%Q_SIZE) == head) error(); q[tail]=val; if (tail == Q_MAX) tail = 0; else tail++; } int dequeue() { int returnval; if (head == tail) error(); returnval = q[head]; if (head == Q_MAX) head = 0; else head++; return returnval; } 11 © 2010 Husam Alzaq Computers as Components

12. Models of programs zSource code is not a good representation for programs: yclumsy; yleaves much information implicit. zCompilers derive intermediate representations to manipulate and optiize the program. 12 © 2010 Husam Alzaq Computers as Components

13. Data flow graph zDFG: data flow graph. zDoes not represent control. zModels basic block: code with no entry or exit. zDescribes the minimal ordering requirements on operations. 13 © 2010 Husam Alzaq Computers as Components

14. Single assignment form x = a + b; y = c - d; z = x * y; y = b + d; original basic block x = a + b; y = c - d; z = x * y; y1 = b + d; single assignment form 14 © 2010 Husam Alzaq Computers as Components

15. Data flow graph x = a + b; y = c - d; z = x * y; y1 = b + d; single assignment form + - +* DFG a bc d z x y y1 15 © 2010 Husam Alzaq Computers as Components

16. DFGs and partial orders Partial order: z a+b, c-d; b+d and x*y Can do pairs of operations in any order. + - +* a bc d z x y y1 16 © 2010 Husam Alzaq Computers as Components

17. Control-data flow graph zCDFG: represents control and data. zUses data flow graphs as components. zTwo types of nodes: ydecision; ydata flow. 17

18. © 2010 Husam Alzaq Computers as Components Data flow node Encapsulates a data flow graph: Write operations in basic block form for simplicity. x = a + b; y = c + d 18

19. © 2010 Husam Alzaq Computers as Components Control cond T F Equivalent forms value v1 v2 v3 v4 19

20. CDFG example if (cond1) bb1(); else bb2(); bb3(); switch (test1) { case c1: bb4(); break; case c2: bb5(); break; case c3: bb6(); break; } cond1 bb1() bb2() bb3() bb4() test1 bb5()bb6() T F c1 c2 c3 20 © 2010 Husam Alzaq Computers as Components

21. for loop for (i=0; i<N; i++) loop_body(); for loop i=0; while (i<N) { loop_body(); i++; } equivalent i<N loop_body() T F i=0 21 © 2010 Husam Alzaq Computers as Components

22. Assembly and linking zLast steps in compilation: HLL compile assembly assemble HLL assembly link executable link 22 © 2010 Husam Alzaq Computers as Components

23. Multiple-module programs zPrograms may be composed from several files. zAddresses become more specific during processing: yrelative addresses are measured relative to the start of a module; yabsolute addresses are measured relative to the start of the CPU address space. 23 © 2010 Husam Alzaq Computers as Components

24. Assemblers zMajor tasks: ygenerate binary for symbolic instructions; ytranslate labels into addresses; yhandle pseudo-ops (data, etc.). zGenerally one-to-one translation. zAssembly labels: ORG 100 label1ADR r4,c 24 © 2010 Husam Alzaq Computers as Components

25. Symbol table ADD r0,r1,r2 xxADD r3,r4,r5 CMP r0,r3 yySUB r5,r6,r7 assembly code xx0x8 yy0x10 symbol table 25 © 2010 Husam Alzaq Computers as Components

26. Symbol table generation zUse program location counter (PLC) to determine address of each location. zScan program, keeping count of PLC. zAddresses are generated at assembly time, not execution time. 26 © 2010 Husam Alzaq Computers as Components

27. Symbol table example ADD r0,r1,r2 xxADD r3,r4,r5 CMP r0,r3 yySUB r5,r6,r7 xx0x8 yy0x10 27 © 2010 Husam Alzaq Computers as Components

28. Two-pass assembly zPass 1: ygenerate symbol table zPass 2: ygenerate binary instructions 28 © 2010 Husam Alzaq Computers as Components

29. Relative address generation zSome label values may not be known at assembly time. zLabels within the module may be kept in relative form. zMust keep track of external labels---can’t generate full binary for instructions that use external labels. 29 © 2010 Husam Alzaq Computers as Components

30. Pseudo-operations zPseudo-ops do not generate instructions: yORG sets program location. yEQU generates symbol table entry without advancing PLC. yData statements define data blocks. 30 © 2010 Husam Alzaq Computers as Components

31. Linking zCombines several object modules into a single executable module. zJobs: yput modules in order; yresolve labels across modules. 31 © 2010 Husam Alzaq Computers as Components

32. external reference entry point Externals and entry points xxxADD r1,r2,r3 B a yyy%1 aADR r4,yyy ADD r3,r4,r5 32 © 2010 Husam Alzaq Computers as Components

33. Module ordering zCode modules must be placed in absolute positions in the memory space. zLoad map or linker flags control the order of modules. module1 module2 module3 33 © 2010 Husam Alzaq Computers as Components

34. Dynamic linking zSome operating systems link modules dynamically at run time: yshares one copy of library among all executing programs; yallows programs to be updated with new versions of libraries. 34 © 2010 Husam Alzaq Computers as Components