1. L1 CTT May 14, 2002 New Scheme for Tracking Marvin Johnson

2. L1 CTT May 14, 2002 Equations  Many advantages to equations u give best possible rejection u fast u easy to check  Significant disadvantages for 16 layers u too many equations for cheap solution u fiber inefficiencies require doing 15 out of 16 etc.

3. L1 CTT May 14, 2002 equation generator  formal mathematical formula u computes the leading and trailing pt of a road through a given set of fibers u equation is phi0=phi -.3 r/pt s phi0=tangent of track at origin s r and phi are the coords of the measured point (edge of fiber) s pt is the momentum of the track. u algorithm s calculate phi0 for leading and trailing edge of a given set of fibers for a given pt s select the max of the leading edge and min of the trailing edge (pos pt) s if max < min, we have a track s more detail in D0 note.

4. L1 CTT May 14, 2002 new method  instead of using equations, evaluate formula for each track u convert parallel to serial  Can’t eval, formula for every pt u can find common pt for large number of equations s discard equations until there are only 2 pt’s for each inner and outer fiber –keep about 95% of the efficiency  example for pt > 10 GeV/c u 308 equations u dropped 86, but kept 97.5% avg u 286 equations u dropped 75, 97.1% kept

5. L1 CTT May 14, 2002 10 GeV/c ex.  evaluate one layer per clock cycle - 16 cycles  122 MHz (16 cycles in 132 ns)  about 10 common Pt’s per outer fiber (only 44 done here) u need 20 comparators s calculate all possible equations s At each layer for each comparator input the leading or trailing phi0 for fiber from memory if fiber present –if no fiber present, keep old value s compare with previous value and keep larger (or smaller) s increment 4 bit counter if fiber present

6. L1 CTT May 14, 2002 example cont.  after 16 layers compare if min > max u if true, is counter above preset min. s this is the number of fibers required - say 12 out of 16. u If OK, have a valid track.

7. L1 CTT May 14, 2002 Comparison  222 equations @5 LUT’s per eqn gives 1110 LUT’s not counting routing  Guess at new method is 110 for a factor of 10 in resources. u limited by memory width u VIRTEX II has 511 36 bit words. s use only 32 words because of timing u FPGA with wider memory would make a big difference u Additional memory must come from distributed memory.

8. L1 CTT May 14, 2002 Block Diagram

9. L1 CTT May 14, 2002 Summary  New algorithm gives the same results as equations  Uses about 1/10 the resources (excluding memory) u Includes inefficiencies with little added resources  Requires 122 MHz operation  Narrow memories are a problem  Current solution does not do the gap between outer layer fibers u Simple to add but requires wider memory and about 16 comparators