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EECS Department, Northwestern University, Evanston Thermal-Induced Leakage Power Optimization by Redundant Resource Allocation Min Ni and Seda Ogrenci.

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Presentation on theme: "EECS Department, Northwestern University, Evanston Thermal-Induced Leakage Power Optimization by Redundant Resource Allocation Min Ni and Seda Ogrenci."— Presentation transcript:

1 EECS Department, Northwestern University, Evanston Thermal-Induced Leakage Power Optimization by Redundant Resource Allocation Min Ni and Seda Ogrenci Memik November 6, 2006

2 Thermal Leakage Coupling Four main sources of leakage current –Reverse-biased junction leakage current (IREV) –Gate induced drain leakage (IGIDL) –Gate direct tunneling leakage (IG) –Subthreshold (weak inversion) leakage (Isub)

3 Thermal Leakage Coupling Power consumption as a function of temperature [Pedram06]:

4 Previous Work Low Power Resource Binding  [Chang, DAC95], [Chang, DAC96] Temperature-aware Resource Binding [Mukherjee, DAC05]  Given Resource Constraint  Given Peak Temperature Constraint

5 Motivation Question: how to decide the peak temperature constraint in high-level synthesis?  One possible metric is minimizing the total leakage power Concept: two-state low power design  Phase one: low leakage power resource allocation  Phase two: low dynamic power resource binding Modeling: relation between number of resources n, temperature T and total leakage power P leakage  Solution: find the number of resources, hence, temperature that minimizes the total leakage power

6 Outline Leakage estimation model  Curve fitting  Heat transfer for leakage estimation Redundant resource allocation  Resource dynamic power  Estimating the package properties  Steady state temperature Experimental results

7 Leakage Modeling Analytic Model Curve fitting  Exact Lagrange’s interpolation:

8 Leakage Modeling Benefit vs. Analytic:  Polynomial is better for analytical and numerical computation  Let HSpice take care of the physical details Benefit vs. non-exact fitting, e.g. least-square  Exact fitting over the range of interest

9 Heat Transfer Modeling The basic relation between power density, heat transfer coefficient and temperature [Im, IEDM00]  Temperature evaluation based on dynamic power, which assumes to be a constant value

10 Heat Transfer Modeling Actual power The situation becomes more complicated after adding the leakage power Leakage power scaling based on the area of resource  F = 250 for 16-bit multiplier with area = 2107.54  F = 80 for 32-bit adder with area = 665.77

11 Optimal Resource Number The relation between the number of resources and total leakage power  If we set, we have, 

12 What’s Next Given the number of resources n, the subproblem becomes solving the following equation Here, we still have two unknown values  Dynamic power P d  Heat transfer coefficient h Our goal is to decide n, which minimizes the following  P leakage = n*L p (T x )

13 Resource Dynamic Power Estimation Assumptions and simplifications  Each resource consumes a typical average dynamic power for executing one operation  Ignore the dynamic power of extra dynamic power of MUX when sharing resource Dynamic power of one operation is Bench#stepsP d per AddP d per Multi Arf21534.193446.26 Ewf17659.894257.15 Fdct12934.846030.96 Fft15747.874824.77

14 Estimating the Package Properties Tradeoff between heat transfer coefficient and cost  Thermal runaway  Maximum h (minimum cost) package Find the maximum h  Binary search  Two Initial points

15 Steady State Temperature Solve the following equation by secant method Secant method, no explicit derivative is needed Initial point

16 Complete flow of algorithm Incremental search  The solution space is small Near-optimal solution  The leakage benefit becomes small Optimize when more than one resource type is in the DFG  First add redundancy for the module with highest power density  The operations are assumed to be distributed evenly among all available resources

17 Experiment results Resources used in the experiments Scaling from 180nm down to 70nm by full-scale methodology Benchmarks are popular DSP and multimedia kernels [Mangione-Smith, Micro97], example “arf”, AreaAverage P d Delay Adder665.773472.000.619 Multiplier2107.5422399.001.227

18 Experiment Results Leakage power vs. min-resource allocation(53.8% improvement) and temperature-aware allocation(35.7% improvement) [Mukherjee, DAC05]

19 Experiment Results Resource temperature of different allocation strategies  Adder and multiplier temperature

20 Conclusions The contribution of this paper includes:  A paradigm for two-stage low power resource allocation and binding methodology  A simple leakage estimation model in high-level synthesis design phase  A leakage optimizing algorithm trading off resource area with total leakage power Thank you


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