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Brian Otis Wireless Sensing Lab Seattle, WA, USA Techniques for miniaturization of circuits and systems.

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Presentation on theme: "Brian Otis Wireless Sensing Lab Seattle, WA, USA Techniques for miniaturization of circuits and systems."— Presentation transcript:

1 Brian Otis Wireless Sensing Lab Seattle, WA, USA botis@ee.washington.edu botis@ee.washington.edu Techniques for miniaturization of circuits and systems for wireless sensing

2 Vision Existing technologies How do we get there? –Circuit techniques –Energy harvesting techniques –Integration techniques

3 Vision: autonomous sensing Miniaturized devices (a few mm 3 ) Extremely inexpensive Frequent radio contact with peers and with basestation Periodic sensing of environmental parameters (temperature, light, pressure, acceleration etc.) Flexible deployment in wide variety of biological, manufacturing, or environmental monitoring applications

4 Vision: autonomous sensing Miniaturized devices (a few mm 3 ) Extremely inexpensive Frequent radio contact with peers and with basestation Periodic sensing of environmental parameters (temperature, light, pressure, acceleration etc.) Flexible deployment in wide variety of biological, manufacturing, or environmental monitoring applications Critical challenges: miniaturization of - RF Link - Reference clock generation - Power sources

5 RF Link: existing designs won’t work – why? 1.They are too large. Traditional architectures require multiple off-chip components, high die area, and a large quartz crystal resonator. 2.They consume too much power. Bluetooth & Zigbee (the “low power” standards) consume > 20mW. This eliminates the possibility of energy harvesting. 3. They require high-end processes and high transistor counts. ~2cm

6 What about RFID? Case study: Hitachi  -chip (150x150x7.5)  m 3 (168e-6 mm 3 ) Si Density  =2330kg/m 3  mass of one chip = 0.393  g (small) Millions of die/wafer < $0.10 US (cheap) Interrogator output power: 0.3W Range: 450mm (limited capabilities) M. Usami et. al, ISSCC 2006

7 Case Study: Hitachi RFID chip Power is extracted from incoming RF energy External antenna (few cm) Ideal for embedding in secure documentation M. Usami et. al, ISSCC 2006 Power harvesting Frequency reference harvesting (100kHz clock)

8 RFID Interrogators Provides two critical functions that are currently impossible to generate on-chip: 1.Accurate quartz-based frequency reference 2.Power source Power dissipation >1W Cost >$100 US

9 RFID summary 1.RFID chips can be made extremely small and cheap 2.These are radios that harvest their power from an incoming RF signal. RF power falls off quadratically (at best) with distance, resulting in high interrogator power and very short range. 3. There is little energy available for sensing or computation. 4. They cannot form peer-to-peer networks.

10 Research Goal Self-contained wireless sensing systems that can be fabricated exclusively with thin-film processing techniques. This should include: Peer-to-peer Wireless links Computation/Data Storage Chemical/biological Sensors Electrical Sensor Interfaces Energy/Power Source

11 Three steps to autonomy 1.Generate accurate frequency reference locally 2.Generate power locally 3.Develop circuit design techniques for reducing computing/sensing/communication power consumption

12 100  m On-Chip Inductors (Q ~10) MEMS Resonators (Q~1000) ~300  m MEMS resonators have significantly higher Q than on-chip inductors Possibility for elimination of quartz resonators MEMS sensing capabilities RF MEMS: path to ultra-small radios?

13 System proof-of-concept Can we design an entire low-power radio link using MEMS resonators as a frequency reference? Case Study: 2GHz transceiver for wireless sensors Goal: Use matching RF MEMS resonators on the transmit and receive paths to define carrier frequency

14 1mm 3, 2GHz super-regenerative transceiver No external components (inductors, crystals, capacitors) 0.13um CMOS Operates above transistor f T 2mm Total Rx: 380uW Range: 30m Datarate: 50kbps 1mm BAW CMOS B. Otis et al., IEEE ISSCC 2005

15 Three steps to autonomy 1.Generate accurate frequency reference locally 2.Generate power locally 3.Develop circuit design techniques for reducing computing/sensing/communication power consumption

16 Bottom line: -Approximately 100uW/cm 3 available (but efficiency decreases as volume shrinks) -Power consumption of electronics determines wireless sensor volume and capabilities Energy Harvesting Extracting energy from the environment to power the electronics reduces maintenance costs and increases capabilities PV cell antenna

17 How does it work? Converts thermal gradient to electric potential via Seebeck effect Thermocouples connected in series as a thermopile increases voltage (and resistance) Radioisotope powered TEGs widely used in space missions Thermoelectric energy harvesting Why thermoelectric? Large, stable temperature gradients often exist in ubiquitous sensing applications Monolithic, solid state, possible to integrate with circuitry Work-in-progress: SOI-based  TEG p,n silicon thermoelements Floating membrane increases thermal isolation

18 Three steps to autonomy 1.Generate accurate frequency reference locally 2.Generate power locally 3.Develop circuit design techniques for reducing computing/sensing/communication power consumption -> example: sensor ID generation

19 Inexpensive, low power sensor identification Wireless sensor network addressing Object identification for Radio Frequency ID (RFID) tags Wafer and process tracking of individual chips for failure analysis Tracking for implantable electronics devices Can we extract a unique digital fingerprint from process variations? 10101111 00110101 0111001

20 ID Generating Circuit Requirements ID circuit must generate a digital output ID code must be repeatable and reliable over supply, temperature, aging and thermal noise The ID code length and stability must allow positive unique identification of each die Low power consumption, no calibration

21 Proposed Idea: positive feedback ID generation Each ID cell: cross-coupled gates used to amplify transistor mismatch –Evaluation period  Node A and B will split due to transistor mismatch –Readout period  Digital-level output will be obtained directly at ID node BA A B time(s) voltage (V)

22 Chip Implementation 128 ID generators – 140nW @ 1V Technology: 0.13  m CMOS Provides stable fingerprint with extremely high probability of correct chip identification Su, Holleman, Otis, IEEE ISSCC 2007

23 Conclusions 1. Wireless sensor scaling is constrained by energy source, antenna dimensions, and frequency reference 2. Self-contained wireless sensors less than 1mm 3 are on the horizon 3. Future chips will include circuitry, EM elements, MEMS structures, sensors, and power generation 500um 4.Interdisciplinary collaboration is critical to focus our efforts on relevant sensing problems


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