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Technion 1 (Yet another) decision procedure for Equality Logic Ofer Strichman and Orly Meir Technion
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2 Equality Logic E : ( x 1 = x 2 Æ ( x 2 x 3 Ç x 1 x 3 )) Domain: x 1, x 2, x 3 2 N The satisfiability problem: is there an assignment to x 1, x 2, x 3 that satisfies E ? Q: When is Equality Logic useful ?... 000011
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Technion3 Equality Logic E :( x 1 = x 2 Æ ( x 2 x 3 Ç x 1 x 3 )) A: Mainly when combined with Uninterpreted Functions f ( x, y ), g ( z ),… Mainly used in proving equivalences, but not only. 000011
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Technion4 Basic notions E : x = y Æ y = z Æ z x x y z (non-polar) Equality Graph: Gives an abstract view of E
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Technion5 From Equality to Propositional Logic Bryant & Velev CAV’00 – the Sparse method E : x 1 = x 2 Æ x 2 = x 3 Æ x 1 x 3 B : e 1,2 Æ e 2,3 Æ :e 1,3 Encode all edges with Boolean variables This is an abstraction Transitivity of equality is lost! Must add transitivity constraints! e 1,3 e 1,2 e 2,3 x1x1 x2x2 x3x3
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Technion6 From Equality to Propositional Logic Bryant & Velev CAV’00 – the Sparse method E : x 1 = x 2 Æ x 2 = x 3 Æ x 1 x 3 B : e 1,2 Æ e 2,3 Æ :e 1,3 Transitivity Constraints: For each cycle of size n, forbid a true assignment to n -1 edges T S = ( e 1,2 Æ e 2,3 ! e 1,3 ) Æ ( e 1,2 Æ e 1,3 ! e 2,3 ) Æ ( e 1,3 Æ e 2,3 ! e 1,2 ) Check: B Æ T S e 1,3 e 1,2 e 2,3 x1x1 x2x2 x3x3
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Technion7 Thm-1: It is sufficient to constrain simple cycles only e1e1 e2e2 e3e3 e4e4 e5e5 e6e6 T TT TT F From Equality to Propositional Logic Bryant & Velev CAV’00 – the Sparse method
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Technion8 Thm-2: It is sufficient to constrain chord-free simple cycles e1e1 e2e2 e3e3 e4e4 e5e5 T T T F T F From Equality to Propositional Logic Bryant & Velev CAV’00 – the Sparse method
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Technion9 Still, there can be an exponential number of chord- free simple cycles… Solution: make the graph ‘chordal’! …. From Equality to Propositional Logic Bryant & Velev CAV’00 – the Sparse method
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Technion10 Dfn: A graph is chordal iff every cycle of size 4 or more has a chord. How to make a graph chordal ? eliminate vertices one at a time, and connect their neighbors. From Equality to Propositional Logic Bryant & Velev CAV’00 – the Sparse method
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Technion11 In a chordal graph, it is sufficient to constrain only triangles. Polynomial # of edges and constraints. # constraints = 3 £ #triangles T T T T F TT Contradiction! From Equality to Propositional Logic Bryant & Velev CAV’00 – the Sparse method
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Technion12 An improvement Reduced Transitivity Constraints (RTC) So far we did not consider the polarity of the edges. Assuming E is in Negation Normal Form E : x = y Æ y = z Æ z x x y z (polar) Equality Graph: = =
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Technion13 Monotonicity of NNF Thm-3: NNF formulas are monotonically satisfied (in CNF this is simply the pure literal rule) Let be in NNF and satisfiable. Thm-3 implies: Let ² Derive ’ from by switching the value of a ‘mis-assigned’ pure literal in Now ’ ²
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Technion14 Claim: in the following graph T R = e 3 Æ e 2 ! e 1 is sufficient This is only true because of monotonicity of NNF (an extension of the pure literal rule) An improvement Reduced Transitivity Constraints (RTC) e1e1 e2e2 e3e3 x z y = = Allowing e.g. e 1 = e 2 = T, e 3 = F
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Technion15 Basic notions E : x = y Æ y = z Æ z x The Equality predicates: { x = y, y = z, z x } which we can break to two sets: E = ={ x = y, y = z }, E = { z x } The Equality Graph G E ( E ) = hV, E =, E i (a.k.a “E-graph”) x y z
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Technion16 Basic notions E : x = y Æ y = z Æ z x unsatisfiable 2 E : x = y Æ y = z Ç z x satisfiable The graph G E ( E ) represents an abstraction of E It ignores the Boolean structure of E x y z
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Technion17 Basic notions Equality Path: a path made of equalities. we write x =* z Disequality Path: a path made of equalities and exactly one disequality. We write x * y Contradictory Cycle: two nodes x and y, s.t. x= * y and x * y form a contradictory cycle x y z
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Technion18 Basic notions Thm-4: Every contradictory cycle is either simple or contains a simple contradictory cycle
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Technion19 Definitions Dfn: A contradictory Cycle C is constrained under T if T does not allow this assignment C = F T T T T
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Technion20 Definitions Let C = ( e s, e 1,…, e n ) where e s is solid and e 1,…, e n are dashed be a simple (contradictory) cycle. Let T be a formula over the Boolean variables encoding C We say that C is constrained in T with respect to e s iff every assignment s.t. ( e s ) = F and ( e 1 ) = …= ( e n ) = T contradicts T
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Technion21 Main theorem If T R constrains all simple contradictory cycles, and For every assignment S, S ² T S ! S ² T R then E is satisfiable iff B Æ T R is satisfiable The Equality Formula From the Sparse method
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Technion22 Proof of the main theorem ( ) E is satisfiable BÆT S is satisfiable BÆT R is satisfiable ( ) Proof strategy: Let R be a satisfying assignment to B Æ T R We will construct S that satisfies B Æ T S From this we will conclude that E is satisfiable Skip proof
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Technion23 Definitions for the proof… A Violating cycle under an assignment R This assignment violates T S but not necessarily T R eFeF e T2 e T1 T T F Either dashed or solid
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Technion24 More definitions for the proof… An edge e = ( v i, v j ) is equal under an assignment iff there is an equality path between v i and v j all assigned T under Denote: T T F T T v1v1 v2v2 v3v3
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Technion25 More definitions for the proof… An edge e = ( v i, v j ) is disequal under an assignment iff there is a disequality path between v i and v j in which the solid edge is the only one assigned false by Denote: T T F T T v1v1 v2v2 v3v3
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Technion26 Proof… Observation 1: The combination is impossible if = R (recall: R ² T R ) Observation 2: if ( v 1, v 3 ) is solid, then F T T v1v1 v2v2 v3v3
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Technion27 ReConstructing S Type 1: It is not the case that Assign S ( e 23 ) = F Type 2: Otherwise it is not the case that Assign ( e 13 ) = T F T T In all other cases S = R F T T F T v1v1 v2v2 v3v3 v1v1 v2v2 v3v3
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Technion28 ReConstructing S Starting from R, repeat until convergence: ( e T ) := F in all Type 1 cycles ( e F ) := T in all Type 2 cycles All Type 1 and Type 2 triangles now satisfy T S B is still satisfied (monotonicity of NNF) Left to prove: all contradictory cycles are still satisfied
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Technion29 Proof… Invariant: contradictory cycles are not violating throughout the reconstruction. contradicts the precondition to make this assignment… F T T v1v1 v2v2 v3v3 F T T
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Technion30 Proof… Invariant: contradictory cycles are not violating throughout the reconstruction. contradicts the precondition to make this assignment… F T T v1v1 v2v2 v3v3 T T F
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Technion31 Applying RTC How can we use the theorem without enumerating contradictory cycles ? Answer: Consider the chordal graph. Constrain triangles if they are part of a (simple) contradictory cycle How?
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Technion32 The RTC algorithm Bi-Connected Component (BCC) – maximal set of edges s.t. any two edges in the set lie on a common simple cycle. Find all BCC-s with one solid edge. Add solid chords from the graph, and auxiliary dashed chords to make the BCC chordal.
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Technion33 Focus on Bi-connected dashed components built on top of a solid edge Includes all contradictory cycles involving this edge
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Technion34 Make the component chordal Chordal-ity guarantees: every cycle contains a simplicial vertex, i.e. a vertex that its neighbors are connected.
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Technion35 The RTC algorithm Constraints cache: e 2 Æ e 3 ! e 1 e 4 Æ e 7 ! e 2 e 5 Æ e 8 ! e 4 1 23 4 5 6 8 9 12 11 7
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Technion36 Constrains all contradictory cycles Constraints cache: e 2 Æ e 3 ! e 1 e 4 Æ e 7 ! e 2 e 6 Æ e 3 ! e 4 1 2 3 4 5 6 8 9 12 11 7
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Technion37 x0x0 x1x1 x2x2 x3x3 x6x6 x4x4 x5x5 The constraint e 3,6 Æ e 3,5 e 5,6 is not added Constraining simple contradictory cycles cache: … e 5,6 Æ e 4,6 e 4,5 Open problem: constrain simple contradictory cycles in P time
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Technion38 x0x0 x1x1 x2x2 x3x3 x6x6 x4x4 x5x5 the constraint e 3,6 Æ e 3,5 e 5,6 is not added, though needed Suppose the graph has 3 more edges Constraining simple contradictory cycles cache: … e 5,6 Æ e 4,6 e 4,5 Here we will stop, although … Open problem: constrain simple contradictory cycles in P time
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Technion39 Results
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Technion40 Example: Circuit Transformations A pipeline processes data in stages Data is processed in parallel – as in an assembly line Formal Model: Stage 1 Stage 3 Stage 2
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Technion41 Example: Circuit Transformations The maximum clock frequency depends on the longest path between two latches Note that the output of g is used as input to k We want to speed up the design by postponing k to the third stage
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Technion42 Validating Circuit Transformations = ?
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Technion43 Validating a compilation process Source program z = ( x 1 + y 1 ) ( x 2 + y 2 ); Target program u 1 = x 1 + y 1 ; u 2 = x 2 + y 2 ; z = u 1 u 2 ; Need to prove that: ( u 1 = x 1 + y 1 u 2 = x 2 + y 2 z = u 1 u 2 ) $ z = ( x 1 + y 1 ) ( x 2 + y 2 ) Compilation Target Source
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Technion44 Validating a compilation process Need to prove that: ( u 1 = x 1 + y 1 u 2 = x 2 + y 2 z = u 1 u 2 ) $ z = ( x 1 + y 1 ) ( x 2 + y 2 ) f1f1 f2f2 g1g1 g2g2 f1f1 f2f2 Source program z = ( x 1 + y 1 ) ( x 2 + y 2 ); Target program u 1 = x 1 + y 1 ; u 2 = x 2 + y 2 ; z = u 1 u 2 ; Compilation
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Technion45 Need to prove that: ( u 1 = x 1 + y 1 u 2 = x 2 + y 2 z = u 1 u 2 ) $ z = ( x 1 + y 1 ) ( x 2 + y 2 ) f1f1 f2f2 g1g1 g2g2 f1f1 f2f2 Instead, prove: under functional consistency: for every uninterpreted function f x = y ! f ( x ) = f ( y ) Which translates to (via Ackermann’s reduction): Validating a compilation process
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