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S. Reda EN160 SP’08 Design and Implementation of VLSI Systems (EN1600) lecture06 Prof. Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison Wesley – Rabaey/Pearson]
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S. Reda EN160 SP’08 Computer-Aided Design (CAD) Tools Early days were easy. The first IC-based microprocessor 4004 from Intel had only 2300 transistors (manufactured in 10 micron technology). Almost manual design. Current chips has well about 1B transistors. To get the chip to market fast, CAD tools are needed.
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S. Reda EN160 SP’08 A simple tool chain Layout and routing Cell library simulation IC layout/ area Verification and timing/ power results Hardware Description Languages synthesis specifications schematic entry
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S. Reda EN160 SP’08 Design Layout using Tanner L-Edit
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S. Reda EN160 SP’08 How to implement the layout for an inverter?
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S. Reda EN160 SP’08 1. First setup technology Use AMI 0.5μ submicron technology (λ=0.3μ)
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S. Reda EN160 SP’08 Design rules are a bit different than book active polysilicon contacts metal
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S. Reda EN160 SP’08 Adjust design in terms of lambda
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S. Reda EN160 SP’08 N well creation
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S. Reda EN160 SP’08 Active region
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S. Reda EN160 SP’08 P-Select
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S. Reda EN160 SP’08 N-select
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S. Reda EN160 SP’08 Active well/substrate taps Had to adjust well
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S. Reda EN160 SP’08 Select for taps
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S. Reda EN160 SP’08 Polysilicon
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S. Reda EN160 SP’08 Metal 1
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S. Reda EN160 SP’08 Contacts (to active)
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S. Reda EN160 SP’08 Contacts to poly
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S. Reda EN160 SP’08 Contacts to poly
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S. Reda EN160 SP’08 Piece of metal1 for input pin
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S. Reda EN160 SP’08 Via1 from metal1 to metal2
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S. Reda EN160 SP’08 Add little metal2 for output pin
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S. Reda EN160 SP’08 Design Rule Checker (DRC) verifies that your layout does not violate any rules ignore density warnings if they show up error
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S. Reda EN160 SP’08 Design cosmetics Translate your design to the origin
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S. Reda EN160 SP’08 Label your inverter pins Make sure you are on the right layer When you label pin, you can select a region (not just point)
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