1. Lecture 19, Slide 1EECS40, Fall 2004Prof. White Lecture #19 ANNOUNCEMENTS Midterm 2 Thursday Nov. 18, 12:40-2:00 pm A-L initials in F295 Haas Business School M-Z initials in Sibley auditorium Closed book, except for an 8.5 x 11 inch sheet of notes, calculator OK, no cell phones. HW 9 will be due no later than 4 pm Friday Nov. 12 because of the Veteran’s Day holiday Nov. 11 OUTLINE –The CMOS inverter (cont’d) –CMOS logic gates –The body effect Reading (Rabaey et al.) Chapter 5.5.1 (p.220 – original book’s pagination)

2. Lecture 19, Slide 2EECS40, Fall 2004Prof. White Features of CMOS Digital Circuits The output is always connected to V DD or GND in steady state  Full logic swing; large noise margins  Logic levels are not dependent upon the relative sizes of the devices (“ratioless”) There is no direct path between V DD and GND in steady state  no static power dissipation

3. Lecture 19, Slide 3EECS40, Fall 2004Prof. White The CMOS Inverter: Current Flow during Switching V IN V OUT V DD 0 0 N: off P: lin N: lin P: off N: lin P: sat N: sat P: lin N: sat P: sat A BDE Ci i S D G G S D V DD V OUT V IN

4. Lecture 19, Slide 4EECS40, Fall 2004Prof. White Power Dissipation due to Direct-Path Current V DD -V T VTVT time v IN : i:i: I peak V DD 0 0 i S D G G S D V DD v OUT v IN Energy consumed per switching period: t sc

5. Lecture 19, Slide 5EECS40, Fall 2004Prof. White An NMOSFET is a closed switch when the input is high N-Channel MOSFET Operation NMOSFETs pass a “strong” 0 but a “weak” 1 Y = X if A and B Y = X if A or B B A X B A X YY

6. Lecture 19, Slide 6EECS40, Fall 2004Prof. White A PMOSFET is a closed switch when the input is low P-Channel MOSFET Operation PMOSFETs pass a “strong” 1 but a “weak” 0 Y = X if A and B = (A + B) Y = X if A or B = (AB) B A X B A X YY

7. Lecture 19, Slide 7EECS40, Fall 2004Prof. White Pull-Down and Pull-Up Devices In CMOS logic gates, NMOSFETs are used to connect the output to GND, whereas PMOSFETs are used to connect the output to V DD. –An NMOSFET functions as a pull-down device when it is turned on (gate voltage = V DD ) –A PMOSFET functions as a pull-up device when it is turned on (gate voltage = GND) F(A 1, A 2, …, A N ) PMOSFETs only NMOSFETs only … … Pull-up network Pull-down network V DD A1A2ANA1A2AN A1A2ANA1A2AN input signals

8. Lecture 19, Slide 8EECS40, Fall 2004Prof. White CMOS NAND Gate ABF 001 011 101 110 A F B AB V DD

9. Lecture 19, Slide 9EECS40, Fall 2004Prof. White CMOS NOR Gate A F B A B V DD ABF 001 010 100 110

10. Lecture 19, Slide 10EECS40, Fall 2004Prof. White CMOS Pass Gate A X Y A Y = X if A

11. Lecture 19, Slide 11EECS40, Fall 2004Prof. White V T is a function of V SB : The “Body Effect”  is the body effect coefficient When the body-source pn junction is reverse-biased, |V T | increases. Usually, we want to minimize  so that I Dsat will be the same for all transistors in a circuit.

12. Lecture 19, Slide 12EECS40, Fall 2004Prof. White Example (0.25  m CMOS technology)