1. Parking Pal Presentation #4 Team M1: Anna Kochalko Chris Moody Hong Tuck Liew John Wu September 24, 2007 Behavioral & Floorplan Your digital parking meter of the future!

2. Status Project Chosen Options explored and eliminated Specification defined Behavioral Verilog Test Benches  Combinational Verilog  Test Benches  Schematic Design  Layout  Simulations

3. Block Diagrams MULT MUX ADD MUX currentTime[10:6] (hrs) 60 currentTime[5:0] (Min) 1 timeInMin hourToMin start swipeIn = 1 only when the card swipes in, then it goes low Start = (swipeIn || carArrive)

4. UserID R_19R_18R_1R_0I_19I_18I_1I_0 ID NUMBER (20 bits) getID 00001111 noCar10Min swipeOut noCar

5. adder addresses F(currentdate) Reg (address) SRAM Reg (rate) Reg (time) FSM charge getCharge DECREMENT 10 noCar10Min FSM 10

6. Mult/adder noCar ~rate 60currentTime min hrs Tea Encryption Binary to BCD Main Mux (MM) AdderSubtractor Compare (max) (realTimeIn) /11 /6 /7 MM ticketTime /11 getTicket ID # 0 0 realTimeIn timeLimit timeInMin 0 7SegmentDisplay FlashMemory Charge rate TimeLeft /11 /1 /20 /1 /11 /7 BLOCK DIAGRAM startTime timeIn reg Car swipeIn getID Write_en timeInMin Charge getCharge start /1 /12 rate 0 TL2 TL2[10] 10 F(currentdate) addresses

7. Size/Transistor Count ComponentSize Multiplier3500(120x80) 2 x MUX (7 Bits)300(30x5) 5 x MUX (11 Bits)750(40x5) 2 x Subtractor (11 Bits)550(55x10) 2 x Adder (11 Bits)500(55x10) FSM1000 2 x Compare (11 Bits)500 Encryption5000(150x100) Binary to BCD2000 (90x15) Total Transistor Count14250

8. Floorplan – 250x225

9. Test Benches Verified working:  Swipe/Car triggering  Rate lookup table  Charge accumulation  TEA Encryption (64-bit key, 16 round) Verified using 2 C instances against Verilog