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Dayle Kotturi Controls April 29, 2004 Controls Overview LCLS Facility Advisory Committee April 29-30, 2004 Outline Status.

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Presentation on theme: "Dayle Kotturi Controls April 29, 2004 Controls Overview LCLS Facility Advisory Committee April 29-30, 2004 Outline Status."— Presentation transcript:

1 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Controls Overview LCLS Facility Advisory Committee April 29-30, 2004 Outline Status update Resources Existing system Proposed new design Task descriptions Next 12 months Conclusions

2 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Update: February 2004 – April 2004 Intent to unify the design efforts across the WBS Global control effort added for support Design changed to include SLC-aware IOC Allowed new designs outside of CAMAC Re-costing throughout the WBS to reflect VME Design discussions started on SLC-aware IOC and timing hardware required Contact made with some potential personnel

3 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Personnel – Resources 2004 2.42.56.07 1.94.42.81 2005 10.37 3.44.60 1.39.86 10.18 2006 8.12 2.66 2.20.32.31 10.29 2007 6.07 1.90 4.63.51.72 6.32 2008 3.26.77.62.10.05 6.56 Total 30.24 9.33 8.12 4.26 2.37 34.17 Ctl. Elec. Engineer Ctl. Sr. Elec. Tech. Ctl. Elec Tech. Pwr. Elec. Engineer Pwr. Sr. Elec. Tech. Control Prog. Ramp up plan: starts now with two on board, two more starting in June and two more in October.

4 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Costs: PED & Construction FY WBSDESCRIPTION 20042005200620072008 TOTAL K$ 1.2.2 Injector Controls Subsystem PEDProject Engineering46031491 CONProject Construction17976871403072931 TOTAL22577191403073422 558 685 574 520 4962833 1.3.2 Linac Controls & Power Conversion Subsystem PED Project Engineering 1491 559 14 9 2073 CONProject Construction 71 4110 7464927 TOTAL 15624669 760 97000 1.4.2 Undulator Controls Subsystem PED Project Engineering 36605274 914 CON Project Construction 142921759 3614 TOTAL 36203424499 4528 1.5.2 X-ray Transport and Diagnostic Controls Subsystem PEDProject Engineering18742228 CONProject Construction896 TOTAL1879381124 1.6.2 X-ray End Station Controls Subsystem PEDProject Engineering2310586851766 CONProject Construction10537763881 TOTAL23116344615647 1.1.3.1 Global Controls Subsystem PEDProject Engineering CONProject Construction TOTAL 1215 1631762 9 776 828 4182031 1225 9389544183793 258 126 TOTAL for this page 25454

5 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Costs: R&D, Commissioning & Spares FY WBSDESCRIPTION 20042005200620072008 TOTAL K$ 558 685 574 520 4962833 2.4.2 Undulator Controls Subsystem R&DResearch & Development37185 81 77462 PREPre-Operations 104 100308 TOTAL37185 186 177770 2.2.2 Injector Controls Subsystem R&D Research & Development SPRProject Spares 26 PREPre-Operations 2681490 TOTAL 262681490 2.3.2 Linac Controls & Power Conversion Subsystem SPR Project Spares 97 TOTAL 97 2.6.2 X-ray End Station Controls Subsystem PREPre-Operations 142 94236 TOTAL 14294 236 2.1.1.11 Global Controls Subsystem R&D Research & Development SPRProject Spares PREPre-Operations TOTAL 953693432711078 66 101 953694093721245 1199 TOTAL for this page 3838 TOTAL for last two pages 29292

6 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Integration with the SLC Control System SLC Alpha All High Level Apps KISNet (fast closed loop control data) PNet (Pulse ID / User ID) MPG SLC Net (Data Communication) micro Camac I/O RF reference clock Xterm EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS WS Distributed High Level Applications Ethernet (EPICS Protocol) I/OC (SLC-aware) EVGEVG Micro emulator

7 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Global Hardware - Timing Boards SLC micro 476 MHz RF Reference Master Pattern Generator PNET: 128 bit beam codes at 360 Hz CPUCPU EVGEVG Event Generator (PIOP) Beam Code + EPICS Time + EPICS Events LLRF (digitizer) 16 triggers CPUCPU EVREVR Event Receivers (PDU) Diag 16 triggers IOC EVREVR Fiducial Detector (FIDO) 119 MHz w/ 360 Hz fiducial P N E T R C V R Work in progress

8 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Global Communication Buses CPUCPU Beam Code + EPICS Time + EPICS Events LLRF (digitizer) 16 triggers CPUCPU EVREVR Diag 16 triggers IOC EVREVR CPUCPU EVREVR Pwr Supply Ctrl IOC Channel Access SLC Alpha Apps Xterm EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS WS Distributed High Level Applications CPUCPU Vacuum Ctrl SLC-Net over Ethernet Fast Feedback over Ethernet? Machine Protection Drive Laser Off Beam Stop In EVGEVG P N E T R C V R

9 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 SLC Net “Micro” Communication CPUCPU LLRF (digitizer) CPUCPU EVREVR Diag IOC EVREVR CPUCPU EVREVR Power Supply Ctrl IOC SLC Alpha Apps Xterm CPUCPU Vacuum Ctrl SLC-Net over Ethernet Provides data to SLC Applications from EPICS Operates at 10 Hz (not beam synched) Requires significant development in the IOC to emulate SLC “micro” in the IOC On an application by application basis we will evaluate what functions to provide EVGEVG P N E T R C V R

10 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Channel Access CPUCPU LLRF (digitizer) CPUCPU EVREVR Diag IOC EVREVR CPUCPU EVREVR Power Supply Ctrl IOC Channel Access SLC Alpha Apps Xterm EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS W/S Distributed Applications EPICS WS Distributed High Level Applications CPUCPU Vacuum Ctrl A channel access server in SLC provides data from existing SLC micros to EPICS applications All IOCs have both a channel access server to allow access and a client to have access Channel access provides read/write by all clients to all data with a server. All EPICS high level applications are channel access clients that may or may not have a server. EVGEVG P N E T R C V R

11 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Global Communication CPUCPU LLRF CPUCPU EVREVR Diag IOC EVREVR CPUCPU EVREVR Power Supply Ctrl IOC CPUCPU Vacuum Ctrl Fast Feedback over Ethernet? Fast feedback is required to run at 120 Hz Values will be transmitted from RF and selected diagnostics to Power Supply and RF IOCs The communication needs to be reliable, verifiable, and have a well thought out degradation The entire time budget to read, transmit, communicate, control, and settle is 8.3 msec First estimates are that the control system can use 2 msecs to transmit and receive the data Can this be done over a common Ethernet with adequate bandwidth – or is a dedicated one needed? EVGEVG P N E T R C V R

12 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Machine Protection CPUCPU LLRF CPUCPU EVREVR Diag IOC EVREVR CPUCPU EVREVR Power Supply Ctrl IOC CPUCPU Vacuum Ctrl Machine Protection Drive Laser Off Single Beam Dumper Machine protection is used here to define faults requiring global mitigation Response time is under 8 msec There are two mitigation devices: Single Beam Dumper - which prohibits the beam from entering the undulator Drive Laser Off – which prohibits beam from entering the cavity Action must also be taken to reduce the repetition rate of the beam This new design is required to interrupt the beam before the next beam pulse. EVGEVG P N E T R C V R

13 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Timing CPUCPU Beam Code + EPICS Time + EPICS Events LLRF 16 triggers CPUCPU EVREVR Diag 16 triggers IOC EVREVR CPUCPU EVREVR Power Supply Ctrl IOC CPUCPU Vacuum Ctrl Machine Protection Drive Laser Off SLC micro 476 MHz RF Reference Master Pattern Generator 128 bit beam code @ 360 Hz FIDO 119 MHz w/ 360 Hz fiducial Nsec resolution on the timing gates produced from the Event Rcvr 50 psec jitter pulse to pulse Event generator passes along beam code data from SLC Event generator sends events to receivers including: 360 Hz, 120 Hz, 10 Hz and 1 Hz fiducials last beam pulse OK Machine mode EPICS time stamp Event receivers produce to the IOC interrupts on events data from the event generator in registers 16 triggers with configurable delay and width EVGEVG P N E T R C V R

14 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 LCLS Software Tasks – Development SLC-aware IOC Drivers for all new hardware Machine Protection / Mitigation Master pattern generator Fast Feedback Communication High Level Applications Correlation Plots Fast Feedback Loops Emittance reconstruction from wire scans and profile monitors Profile monitor image analysis for slice emittance with the transverse cavity Beam Steering and online orbit modeling Beam Steering “scans” to emittance reconstruction from wire scans and profile monitors

15 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 LCLS Software Tasks – Control Programmer 1RF Control 2Diagnostics 2.1 Toroids & Faraday Cups 2.2 Beam Stops 2.3 Profile Monitors & Video Devices 2.4 Wire Scanners 2.5 Bunch Length Monitors & E/O Diagnostics 2.6 Beam Position Monitors 2.7 Collimators 2.8 All other stops 3Gun Laser and Drive Control 4Vacuum 5Magnet Power Supply Control IOC and software 6Beam Containment / Personnel Protection / Machine Protection

16 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Next 12 months Acquire team: 8 project engineers, 1 low level programmer, and 3 board designers – or contract out or steal designs Start PNet, Timing, LLRF, and BPM design efforts Start the SLC-Aware IOC development Put together detailed designs per subsystem and have them reviewed – revamp costs. Develop prototype for 120 Hz Fast Feedback Develop prototype for video diagnostics Develop prototype for position controllers

17 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Conclusions We need to acquire some key resources to get the critical designs well in hand before they are needed Our key risk is in the design of an SLC-aware IOC and SLC to EPICS timing that will allow us to intermix the SLC and EPICS front-ends. It is also provides a valuable upgrade path for the SLC Linac. We need to make Interface Control Documents for each control subsystem.

18 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Injector Subsystem Designs Timing Digitizer EVREVR TCMTCM EVREVR CPUCPU CPUCPU RF Equipment LLRF 6 instances (1 for each klystron), 1 IOC in total 5 Toroids 1 IOC TCMTCM TCMTCM TCMTCM TCMTCM 1.2.2.3.2 1.2.2.2 EVREVR CPUCPU 4 Faraday Cups with YAGs, share toroid IOC BIBI BOBO GADCGADC 1.2.2.3.3 Preamps LEADLEAD LEAD LEADLEAD Mcond chassis Toroids MPS? Actuator PM Chassis Faraday Cups MKSU SLC

19 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Injector Subsystem Designs EVREVR CPUCPU BIBI BOBO Actuator PM Chassis 1.2.2.3.4 Turn Off MPS Tune Up Dump Beam Code + EPICS Time 11 Profile Monitors (4 YAGs, 7 OTRs), 1 IOC Ethernet EVREVR CPUCPU BIBI BOBO DACDAC Lamps & Actuator Cameras Electronics PM Chassis 1.2.2.3.5 Profile Monitors 1 Tune Up Dump, shares toroid IOC

20 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Injector Subsystem Designs Beam Code + EPICS Time EVREVR BPMBPM EVREVR CPUCPU CPUCPU E/O Diagnostic 1 Pulse length meas. share toroid IOC 21 BPMs 3 IOCs BPMBPM BPMBPM BPMBPM BPMBPM BPMBPM BPMBPM EVREVR CPUCPU BIBI BOBO AOAO GADCGADC SMCTLSMCTL Ilock Chs (2) Motor Controls 1.2.2.4 1.2.2.5 1.2.2.3.7 1.2.2.3.6 Thermocouples AIAI GADCGADC AOAO To llrf Cameras Electronics BPM Pickups Turn off Gun Laser and Heater Ctrls 48 Mirror Motors, 4 Shutters 1 Camera, Joulemeter 1 IOC

21 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Injector Subsystem Designs EVGEVG Beam Code + EPICS Time CPUCPU SLC Timing EVREVR GPIB?GPIB? CPUCPU 30 gauges BIBI BOBO AIAI AOAO AIAI GP307 IG HP937 CCG 30 ion pumps Power Supplies 4 bl valves SLAC PMVC 1.2.2.7 1.2.2.6 FIDO PNET 119 MHz w/ 360Hz Fid Network & Crates 1.2.2.8 LLRF? BCS? Manual valves into MPS? PPS MPS

22 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Injector Subsystem Designs Beam Code + EPICS Time EVREVR CPUCPU High Current High Precision Magnets w/ KLIXONS (4) BIOBIO Magnet Power Supplies (4) 1.2.2.9 Klixon Boxes PS Reg Interface Ethernet Low Current Fast Corrector and Quadrupoles Magnets MCOR Power Supplies (4?) 1.2.16.4 EVREVR CPUCPU PPS Gates Control Logix PLC (3) 1.2.2.10 1.2.16.1 1.2.16.3 Tone Receiver Control Logix PLC (1) Laser PPS Gates SAMSAM RTDRTD AIOAIO temperatures

23 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 LINAC Subsystem Designs Timing DACDAC EVREVR TCMTCM EVREVR CPUCPU CPUCPU RF Equipment LLRF 1 Phase Control 24/30 Remaining in SLC 6 Toroids 1 IOC TCMTCM TCMTCM TCMTCM TCMTCM 1.3.2.6.3 1.3.2.5 Preamps LEADLEAD LEAD LEADLEAD 20 Profile Monitors 1 IOC Ethernet EVREVR CPUCPU BIBI BOBO DACDAC Lamps & Actuator Cameras Electronics PM Chassis 1.3.2.6.5 Toroids Profile Monitors MKSU SLC GADCGADC TCMTCM

24 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 LINAC Subsystem Designs Beam Code + EPICS Time EVREVR BPMBPM CPUCPU 1 Pulse length meas. 143 BPMs 15 IOCs BPMBPM BPMBPM BPMBPM BPMBPM BPMBPM BPMBPM 1.3.2.6.2 BPM Pickups Ethernet EVREVR CPUCPU BIBI BOBO DACDAC Lamps & Actuator Cameras Electronics PM Chassis 1.3.2.6.5 E/O Diagnostics EVREVR CPUCPU SMSM ADCADC Motor elec 1.3.2.6.1 GADCGADC 20 Wire scanners – 11 new, 1 IOC HVPS BIBI BOBO LVDT Wire Scanners And Motors Photo Tube CPUCPU BIBI BOBO Actuator PM Chassis 1.3.2.6.4 Stoppers

25 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 LINAC Subsystem Designs Beam Code + EPICS Time EVREVR CPUCPU BIBI BOBO GADCGADC Mcond chassis Actuator PM Chassis Bunch Length Monitors 1.3.2.6.7 EVREVR CPUCPU BIBI BOBO Actuator PM Chassis 1.3.2.6.9 Turn Off MPS Single Beam Dump EVREVR CPUCPU BIBI BOBO ADCADC Actuator PM Chassis 1.3.2.6.10 E Beam Dump EVREVR CPUCPU BIBI BOBO ADCADC Actuator PM Chassis 1.3.2.6.11 Protection Collimator

26 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 LINAC Subsystem Designs Beam Code + EPICS Time X – Band Accelerator Structure Timing DACDAC EVREVR CPUCPU LLRF MKSU SLC GADCGADC EVREVR CPUCPU BIBI BOBO SMSM Actuator PM Chassis Movable Collimator 1.3.2.6.12 MKSU SLC 1.3.2.6.13

27 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 LINAC Subsystem Designs Beam Code + EPICS Time SLC Timing EVREVR GPIB?GPIB? CPUCPU gauges BIBI BOBO AIAI AOAO AIAI GP307 IG HP937 CCG ion pumps Power Supplies 4 bl valves SLAC PMVC 1.3.2.9 1.3.2.8 LLRF? BCS? 4 chassis for each type of interface PPS MPS EVREVR 24 sets of timing receiver modules

28 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 LINAC Subsystem Designs Beam Code + EPICS Time EVREVR CPUCPU PPS Gates Control Logix PLC (3) 1.3.2.1 EVREVR CPUCPU High Current High Precision Magnets w/ KLIXONS (4) Magnet Power Supplies 1.3.2.4 Klixon Boxes PS Reg Interface Ethernet Low Current Fast Corrector and Quadrapoles Magnets MCOR Power Supplies MPS Tone Receiver BSOIC Beam Containment System PLICPLIC BSOIC 1.3.2.2 1.3.2.6.8 1.3.2.3 BBUSBBUS VMICVMIC

29 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Undulator Subsystem Designs Beam Code + EPICS Time EVREVR CPUCPU AIAI SMCTLSMCTL Motor Controls 1.4.2.2.1 Wire Position Read-backs Fine Motion Control (strong back cradle motion) Motors EVREVR CPUCPU PIEZOPIEZO Motor Controls 1.4.2.2.2 Phase Corrector Motion Wire Scanners And Motors EVREVR CPUCPU SMSM ADCADC LVDT 1.4.2.2.6 GADCGADC Motor Controls 233 motors 4 * 33 controllers 11 wire scanners

30 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Undulator Subsystem Designs Beam Code + EPICS Time EVREVR BPMBPM CPUCPU 33 BPMs 33 IOCs BPMBPM BPMBPM BPMBPM BPMBPM BPMBPM BPMBPM EVREVR CPUCPU GADCGADC 1.4.2.3.2 1.4.2.3.1 BPM Pickups Charge Monitors (Toroid) EVREVR CPUCPU SMCTLSMCTL Motor Controls 1.4.2.2.7 Macroscopic Motion Control 55 controllers 2 Charge monitors 2 IOCs EVREVR CPUCPU GADCGADC 1.4.2.3.2 Scanning Wires ADCs 3 IOCs Downconverters

31 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Undulator Subsystem Designs 11 OTRs Ethernet EVREVR CPUCPU BIBI BOBO DACDAC Lamps & Actuator Cameras Electronics 1.4.2.4.1 Profile Monitors 7 stations Ethernet EVREVR CPUCPU BIBI BOBO DACDAC Lamps & Actuator Cameras Electronics 1.4.2.4.3 Observation Video 66 temperatures CPUCPU AIAI 1.4.2.5 AIAI AIAI AIAI Strongback Temperature Beam Code + EPICS Time

32 Dayle Kotturi Controls Overviewdayle@slac.stanford.edu April 29, 2004 Undulator Subsystem Designs Beam Code + EPICS Time GPIBGPIB CPUCPU 2 gauges BIBI BOBO AIAI AOAO AIAI GP307 IG HP937 CCG 33 ion Pumps * 6 Power Supplies ? bl valves SLAC PMVC 1.4.2.6.1 LLRF? BCS? 2 RGAs PPS CPUCPU Gauge RGA 1.4.2.6.4 MPSMPS CPUCPU 1.4.2.7 Tone Receiver Cherenkov Detector, Gamma Ray Detector, Temperature Ethernet


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