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Application-Specific Codesign Platform Generation for Digital Mockups in Cyber- Physical Systems Bailey Miller *, Frank Vahid *†, Tony Givargis † *Dept. Computer Science & Engineering University of California, Riverside {bmiller,vahid}@cs.ucr.edu †Center for Embedded Computer Systems University of California, Irvine givargis@uci.edu This work is supported by the National Science Foundation (CNS1016792) and Semiconductor Research Corporation (GRC 2143.001)
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Bailey Miller, UC Riverside Testing Cyber-Physical Devices 1/20 It is difficult to test the broad range of environmental conditions for cyber-physical devices Medical devices like ventilators require extensive testing to pass FDA regulations
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Bailey Miller, UC Riverside Testing via a physical mockup 2/20 Simulate complex environment with mechanical analog
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Bailey Miller, UC Riverside Testing via a digital mockup 3/20 Simulate complex environment with a mathematical model Models can simulate dangerous, expensive, or difficult to reproduce scenarios More accurate than mechanical methods
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Bailey Miller, UC Riverside Hardware-in-loop testing Hardware-in-loop not new HiL implementations are ad-hoc and fractured Hanson, et. al. hardware in loop simulation of cardiovascular system device testing [Medical Engineering and Physics, 2007] Steurer, PEBB based high-power hardware-in-loop simulation facility for electric power systems Cai, Design and implementation of a hardware-in-the-loop simulation system for small-scale UAV helicopters. etc…
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Bailey Miller, UC Riverside Digital mockup models Large systems of Ordinary Differential Equations (ODEs) *Gas exchange model: Lutchen et. al. 4/20
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Bailey Miller, UC Riverside Models in real-time? Complex models often not real-time 11 generation branching Weibel model (4094 ODEs) 16,49313,880 5/20
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Bailey Miller, UC Riverside Real-time using FPGAs FPGAs match model characteristics Fine-grain parallelism Local communication P1P2… P3… … FPGA 6/20
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Bailey Miller, UC Riverside Digital mockup framework - requirements A. Flexibility B. Multi-timing support C. Co-design Support Processor Model A (1 KHz) Processor Model B (10 Hz) coproc Gas exchange model Respiratory mechanics model 7/20
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Bailey Miller, UC Riverside Digital mockup framework Digital Mockup (FPGA) Cyber-physical device Processing core Sensor Actuator Device Interface Actuator Models Sensor Models Transducer Bypass – Sirowy, et. al. [International Conference of the IEEE Engineering in Medicine and Biology‘09] Environment Model Interface registers 8/20
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Bailey Miller, UC Riverside Digital mockup framework - example 1. Device software generates command for actuator Digital Mockup (FPGA) Cyber-physical device Processing core Sensor Actuator Device Interface Actuator Models Sensor Models Environment Model Interface registers 9/20
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Bailey Miller, UC Riverside Digital mockup framework - example Digital Mockup (FPGA) Cyber-physical device Processing core Sensor Actuator Device Interface Actuator Models Sensor Models Environment Model Interface registers 2. Device interface intercepts command 10/20
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Bailey Miller, UC Riverside Digital mockup framework - example Digital Mockup (FPGA) Cyber-physical device Processing core Sensor Actuator Device Interface Actuator Models Sensor Models Environment Model Interface registers 3. Actuator model acts on command Outputs of the actuator are registered 11/20
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Bailey Miller, UC Riverside Digital mockup framework - example Digital Mockup (FPGA) Cyber-physical device Processing core Sensor Actuator Device Interface Actuator Models Sensor Models Environment Model Interface registers 4. The environment model obtains registered actuator outputs and continues to advance model state with new input. Outputs of environment model are registered. 12/20
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Bailey Miller, UC Riverside Digital mockup framework - example Digital Mockup (FPGA) Cyber-physical device Processing core Sensor Actuator Device Interface Actuator Models Sensor Models Environment Model Interface registers 5. Sensor models obtain registered outputs of environment model 13/20
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Bailey Miller, UC Riverside Digital mockup framework - example Digital Mockup (FPGA) Cyber-physical device Processing core Sensor Actuator Device Interface Actuator Models Sensor Models Environment Model Interface registers 6. Device interface packages and sends sensor readings to cyber-physical device processing core 14/20
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Bailey Miller, UC Riverside Digital mockup flexibility Models map to one or more processors API for implementing models step(), getSample(), setOutput() Digital Mockup (FPGA) Cyber-physical device Processing core Sensor Actuator Device Interface Actuator Model (proc 1) Sensor Model (proc 2) Environment Model (proc 3) Interface registers void Step() { //airway mechanics model Q = GetSample(FLOW_ADDR); Pv += (Q/Ct-Pv/((Rl+Rt)*Ct) + Pl/((Rl+Rt)*Ct )) *dt; Pc = Pv*(Rl/(Rt+Rl))+Pl*(Rt/(Rl+Rt)); Pl += (Pv/(Cl*(Rl+Rt))-Pl/(Cl*(Rl+Rt)))*dt; SetOutput(PRESSURE_ADDR,Pc); } void Step() { //Gas exchange model Q = GetSample(FLOW_ADDR); F = (Q-Pl)/R; Vl += F*dt; dVl/DPl += C*dt; C_lung = Q_lung/Vl; k = ln(Vmax/Vmin)/a; Q_lung = C_air + (C_lung-C_air)*exp(-k*t); SetOutput(PRESSURE_ADDR,Pc); SetOutput(CONCENTRATION_ADDR, Q_lung); … } 15/20
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Bailey Miller, UC Riverside Digital mockup multi-timing support Models may be solved at different time steps Models need not be synchronized Update interface registers after each time step to ensure up-to-date data is available Digital Mockup (FPGA) Device Interface Actuator Model Sensor Model Environment Model 16/20 Interface registers
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Bailey Miller, UC Riverside Digital mockup co-design support 3. Co-design Support Digital Mockup (FPGA) Device Interface Actuator Model Sensor Model Environment Model coproc controller Environment Model Coprocessor Step() { //processor hosts interface to coproc WriteCoprocessor(COPROCESSOR_FLOW_ADDR, getSample(FLOW_ADDR)); StepCoprocessor(); SetOutput(ReadCoProcessor(PRESSURE_ADDR)); } StepCoProcessor: process(clock_i) begin case state is when ‘0’ => step_done_o <= ‘0’; if (step_i = ‘1’) then state <= ‘1’; end if; when ‘1’ => model_start <= ‘1’; --model omitted for brevity if (model_done=’1’) then step_done_o <= ‘1’; end if; end case; end process; ReadCoprocessor: process(read_enable_i) if (read_enable=’1’) then case address_i is when “00000000” => data_o <= pressure_register; when “00000001” => data_o <= weibel_gen0_volume; … end case; end if; end process; WriteCoprocessor: process(write_enable_i) if (write_enable=’1’) then case address_i is when “00000001” => flow_register <= data_i; … end case; end if; end process; 17/20
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Bailey Miller, UC Riverside Digital mockup generator tool Automatically generates templates for digital mockup framework Select platform type, transducer information, enable coprocessor support, etc. ~~~~~~~~~ C++, VHDL templates 18/20
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Bailey Miller, UC Riverside Digital mockup generator tool Generated digital mockup using tool Initially, simple model implemented (3 ODEs) on processor only ~2 hours to build new digital mockup test setup Swapped simple lung model with bifurcating model (100+ ODEs) for enhanced accuracy. < 5 minutes to perform swap (cut/paste operation and adding of coprocessor C++ interface code.) Item#C lines #VHDL lines Generated interface templates 221112 Simple lung model65N/A Device interface1971987 Total4702497 Item#C lines #VHDL lines Generated interface templates 221112 Bifurcating Weibel model257350 Device interface1971987 Total42210199 19/20
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Bailey Miller, UC Riverside Conclusions Digital Mockups enhance testing of cyber-physical device software FPGAs allow complex physiological models to run in real-time Proposed framework and tool to guide design of digital mockup test setups Supports model flexibility and co-design capability Shortens time spent on testing of cyber-physical devices Promotes clean and consistent digital mockup implementations Digital mockup (FPGA) Lung model Ventilator Cyber-physical device Pacemaker Heart model Satellite orbital physics 20/20
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