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Penn ESE535 Spring2009 -- DeHon 1 ESE535: Electronic Design Automation Day 16: March 23, 2009 Covering.

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Presentation on theme: "Penn ESE535 Spring2009 -- DeHon 1 ESE535: Electronic Design Automation Day 16: March 23, 2009 Covering."— Presentation transcript:

1 Penn ESE535 Spring2009 -- DeHon 1 ESE535: Electronic Design Automation Day 16: March 23, 2009 Covering

2 Penn ESE535 Spring2009 -- DeHon 2 Previously How to optimize two-level logic –Clear cost model of Product-Terms Generic optimizations for multi-level logic –Common-sub expressions –Kernel extraction –Node decomposition –Speedup Have been abstract about cost of gates

3 Penn ESE535 Spring2009 -- DeHon 3 Covering Problem Implement a “gate-level” netlist in terms of some library of primitives –Potentially netlist came from multi-level optimization we did last week General Formulation –Make it easy to change technology –Make it easy to experiment with library requirements Evaluate benefits of new cells… Evaluate architecture with different primitives

4 Penn ESE535 Spring2009 -- DeHon 4 Input netlist library represent both in normal form: –nand gate –inverters

5 Penn ESE535 Spring2009 -- DeHon 5 Elements of a library - 1 INVERTER2 NAND23 NAND34 NAND45 Element/Area CostTree Representation (normal form) Example: Keutzer

6 Penn ESE535 Spring2009 -- DeHon 6 Elements of a library - 2 AOI21 4 AOI22 5 Element/Area Cost Tree Representation (normal form)

7 Penn ESE535 Spring2009 -- DeHon 7 Input Circuit Netlist ``subject DAG’’

8 Penn ESE535 Spring2009 -- DeHon 8 Problem statement into this library Find an ``optimal’’ (in area, delay, power) mapping of this circuit (DAG)

9 Penn ESE535 Spring2009 -- DeHon 9 Some things to watch today Cost model Problem can be solved well –somewhat clever solution Technique: general and powerful Special cases –harder/easier cases What makes hard Bounding

10 Penn ESE535 Spring2009 -- DeHon 10 What’s the problem? Trivial Covering subject DAG 7NAND2 (3) = 21 5INV (2) = 10 Area cost 31

11 Penn ESE535 Spring2009 -- DeHon 11 Cost Models

12 Penn ESE535 Spring2009 -- DeHon 12 Cost Model: Area Assume: Area in gates or, at least, can pick an area/gate –so proportional to gates e.g. –Standard Cell design –Standard Cell/route over cell –Gate array

13 Penn ESE535 Spring2009 -- DeHon 13 Standard Cell Area invnand3AOI4invnor3Inv All cells uniform height Width of channel determined by routing Cell area Width of channel fairly constant?

14 Penn ESE535 Spring2009 -- DeHon 14 Cost Model: Delay Delay in gates –at least assignable to gates Twire << Tgate Twire ~=constant –delay exclusively/predominantly in gates Gates have Cout, Cin lump capacitance for output drive delay ~ Tgate + fanout  Cin Cwire << Cin or Cwire can lump with Cout/Tgate

15 Penn ESE535 Spring2009 -- DeHon 15 Logic Delay

16 Penn ESE535 Spring2009 -- DeHon 16 Parasitic Capacitances

17 Penn ESE535 Spring2009 -- DeHon 17 Delay of Net

18 Penn ESE535 Spring2009 -- DeHon 18 Cost Model: Delay Delay in gates –at least assignable to gates Twire << Tgate Twire ~=constant –delay exclusively/predominantly in gates Gates have Cout, Cin lump capacitance for output drive delay ~ Tgate + fanout  Cin Cwire << Cin or Cwire can lump with Cout/Tgate

19 Penn ESE535 Spring2009 -- DeHon 19 Cost Models Why do I show you models? –not clear there’s one “right” model –changes over time –you’re going to encounter many different kinds of problems –want you to see formulations so can critique and develop own –simple cost models make problems tractable are surprisingly adequate –simple, at least, help bound solutions –may be wrong today…need to rethink

20 Penn ESE535 Spring2009 -- DeHon 20 Approaches

21 Penn ESE535 Spring2009 -- DeHon 21 Greedy work? Greedy = pick next locally “best” choice 2346

22 Penn ESE535 Spring2009 -- DeHon 22 Greedy In  Out 6 4 2

23 Penn ESE535 Spring2009 -- DeHon 23 Greedy In  Out 8 11

24 Penn ESE535 Spring2009 -- DeHon 24 Greedy Out  In 6 4 2

25 Penn ESE535 Spring2009 -- DeHon 25 Greedy Out  In 8 11

26 Penn ESE535 Spring2009 -- DeHon 26 But… 4 2 4 = 10

27 Penn ESE535 Spring2009 -- DeHon 27 Greedy Problem What happens in the future (elsewhere in circuit) will determine what should be done at this point in the circuit. Can’t just pick best thing for now and be done.

28 Penn ESE535 Spring2009 -- DeHon 28 Brute force? Pick a node (output) Consider –all possible gates which may cover that node –branch on all inputs after cover –pick least cost node

29 Penn ESE535 Spring2009 -- DeHon 29 Pick a Node

30 Penn ESE535 Spring2009 -- DeHon 30 Brute force? Pick a node (output) Consider –all possible gates which may cover that node –recurse on all inputs after cover –pick least cost node Explore all possible covers –can find optimum

31 Penn ESE535 Spring2009 -- DeHon 31 Analyze brute force? Time? Say P patterns, constant time to match each –(if patterns long could be > O(1)) P-way branch at each node… …exponential  O((P) depth )

32 Penn ESE535 Spring2009 -- DeHon 32 Structure inherent in problem to exploit?

33 Penn ESE535 Spring2009 -- DeHon 33 Structure inherent in problem to exploit? There are only N unique nodes to cover!

34 Penn ESE535 Spring2009 -- DeHon 34 Structure If subtree solutions do not depend on what happens outside of its subtree –separate tree –farther up tree Should only have to look at N nodes. Time(N) = N*P*T(match) –w/ P fixed/bounded  linear in N –w/ cleverness work isn’t P*T(match) at every node

35 Penn ESE535 Spring2009 -- DeHon 35 Idea Re-iterated Work from inputs Optimal solution to subproblem is contained in optimal, global solution Find optimal cover for each node Optimal cover: –examine all gates at this node –look at cost of gate and its inputs –pick least

36 Penn ESE535 Spring2009 -- DeHon 36 Work front-to-back

37 Penn ESE535 Spring2009 -- DeHon 37 Work Example (area) library 234545

38 Penn ESE535 Spring2009 -- DeHon 38 Work Example (area) library 234545 3 2 2 3

39 Penn ESE535 Spring2009 -- DeHon 39 Work Example (area) library 234545 3 2 2 3

40 Penn ESE535 Spring2009 -- DeHon 40 Work Example (area) library 234545 3 2 2 3 3+3+2=8

41 Penn ESE535 Spring2009 -- DeHon 41 Work Example (area) library 234545 3 2 2 3 8

42 Penn ESE535 Spring2009 -- DeHon 42 Work Example (area) library 234545 3 2 2 3 8

43 Penn ESE535 Spring2009 -- DeHon 43 Work Example (area) library 234545 3 2 2 3 8 3+2=5

44 Penn ESE535 Spring2009 -- DeHon 44 Work Example (area) library 234545 3 2 2 3 8 5

45 Penn ESE535 Spring2009 -- DeHon 45 Work Example (area) library 234545 3 2 2 3 8 5 3+5=8

46 Penn ESE535 Spring2009 -- DeHon 46 Work Example (area) library 234545 3 2 2 3 8 5 4

47 Penn ESE535 Spring2009 -- DeHon 47 Work Example (area) library 234545 3 2 2 3 8 5 4

48 Penn ESE535 Spring2009 -- DeHon 48 Work Example (area) library 234545 3 2 2 3 8 5 4 8+2+3=13

49 Penn ESE535 Spring2009 -- DeHon 49 Work Example (area) library 234545 3 2 2 3 8 5 4 13

50 Penn ESE535 Spring2009 -- DeHon 50 Work Example (area) library 234545 3 2 2 3 8 5 4 13 13+2=15

51 Penn ESE535 Spring2009 -- DeHon 51 Work Example (area) library 234545 3 2 2 3 8 5 4 13 3+2+4=9

52 Penn ESE535 Spring2009 -- DeHon 52 Work Example (area) library 234545 3 2 2 3 8 5 4 139

53 Penn ESE535 Spring2009 -- DeHon 53 Work Example (area) library 234545 3 2 2 3 8 5 4 139 9+4+3=16

54 Penn ESE535 Spring2009 -- DeHon 54 Work Example (area) library 234545 3 2 2 3 8 5 4 139 8+2+4+4=18

55 Penn ESE535 Spring2009 -- DeHon 55 Work Example (area) library 234545 3 2 2 3 8 5 4 139 16

56 Penn ESE535 Spring2009 -- DeHon 56 Work Example (area) library 234545 3 2 2 3 8 5 4 139 16 16+2=18

57 Penn ESE535 Spring2009 -- DeHon 57 Work Example (area) library 234545 3 2 2 3 8 5 4 139 16 13+5+4=22

58 Penn ESE535 Spring2009 -- DeHon 58 Work Example (area) library 234545 3 2 2 3 8 5 4 139 1618

59 Penn ESE535 Spring2009 -- DeHon 59 Work Example (area) library 234545 3 2 2 3 8 5 4 139 1618 18+3=21

60 Penn ESE535 Spring2009 -- DeHon 60 Work Example (area) library 234545 3 2 2 3 8 5 4 139 1618 9+4+4=17

61 Penn ESE535 Spring2009 -- DeHon 61 Work Example (area) library 234545 3 2 2 3 8 5 4 139 1618 8+2+4+5=19

62 Penn ESE535 Spring2009 -- DeHon 62 Work Example (area) library 234545 3 2 2 3 8 5 4 139 1618 17

63 Penn ESE535 Spring2009 -- DeHon 63 Optimal Cover library 234545 3 2 2 3 8 5 4 139 1618 17

64 Penn ESE535 Spring2009 -- DeHon 64 Optimal Cover library 234545 3 2 2 3 8 5 4 139 1618 17 Much better than 31!

65 Penn ESE535 Spring2009 -- DeHon 65 Note There are nodes we cover which will not appear in final solution.

66 Penn ESE535 Spring2009 -- DeHon 66 “Unused” Nodes library 234545 3 2 2 3 8 5 4 13 9 1618 17

67 Penn ESE535 Spring2009 -- DeHon 67 Dynamic Programming Solution Solution described is general instance of dynamic programming Require: –optimal solution to subproblems is optimal solution to whole problem –(all optimal solutions equally good) –divide-and-conquer gets same (finite/small) number of subproblems Same technique used for instruction selection

68 Penn ESE535 Spring2009 -- DeHon 68 Delay Similar –Cost(node) = Delay(gate)+Max(Delay(input))

69 Penn ESE535 Spring2009 -- DeHon 69 DAG DAG = Directed Acyclic Graph –Distinguish from tree (tree  DAG) –Distinguish from cyclic Graph –DAG  Directed Graph (digraph) treeDAG Digraph

70 Penn ESE535 Spring2009 -- DeHon 70 Trees vs. DAGs Optimal for trees –why? Area Delay

71 Penn ESE535 Spring2009 -- DeHon 71 Not optimal for DAGs Why?

72 Penn ESE535 Spring2009 -- DeHon 72 Not optimal for DAGs Why? 1+1+1=3

73 Penn ESE535 Spring2009 -- DeHon 73 Not optimal for DAGs Why? 1+1+1=3 3+3+1=7 ?

74 Penn ESE535 Spring2009 -- DeHon 74 Not Optimal for DAGs (area) Cost(N) = Cost(gate) +  Cost(input nodes) think of sets cost is magnitude of set union Problem: minimum cost (magnitude) solution isn’t necessarily the best pick –get interaction between subproblems –subproblem optimum not global...

75 Penn ESE535 Spring2009 -- DeHon 75 Not Optimal for DAGs Delay: –in fanout model, depends on problem you haven’t already solved (delay of node depends on number of uses)

76 Penn ESE535 Spring2009 -- DeHon 76 What do people do? Cut DAGs at fanout nodes optimally solve resulting trees Area –guarantees covered once get accurate costs in covering trees, made “premature” assignment of nodes to trees Delay –know where fanout is

77 Penn ESE535 Spring2009 -- DeHon 77 Bounding Tree solution give bounds (esp. for delay) –single path, optimal covering for delay –(also make tree by replicating nodes at fanout points) no fanout cost give bounds –know you can’t do better delay bounds useful, too –know what you’re giving up for area –when delay matters

78 Penn ESE535 Spring2009 -- DeHon 78 (Multiple Objectives?) Like to say, get delay, then area –won’t get minimum area for that delay –algorithm only keep best delay –…but best delay on off critical path piece not matter …could have accepted more delay there –don’t know if on critical path while building subtree –(iterate, keep multiple solutions)

79 Penn ESE535 Spring2009 -- DeHon 79 Many more details... Implement well Combine criteria –(touch on some later) …see literature

80 Penn ESE535 Spring2009 -- DeHon 80 Admin No class Wednesday –Work on problems 1 and 2 of assignment Reading for next Monday online –Flowmap  classic FPGA-mapping paper

81 Penn ESE535 Spring2009 -- DeHon 81 Big Ideas simple cost models problem formulation identifying structure in the problem special structure characteristics that make problems hard bounding solutions


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