1. Computer ArchitectureFall 2008 © August 25, 2008 www.qatar.cmu.edu/~msakr/15447-f08/ CS 447 – Computer Architecture Lecture 3 Computer Arithmetic (1)

2. Computer ArchitectureFall 2008 © Computers and Arithmetic operations °How do computers represent numbers? How about negative numbers? °How do computers add? subtract? multiply? etc… Hardware or software? What happens if the resulting number is bigger than the space we have for it? °How about fractions?

3. Computer ArchitectureFall 2008 © Chapter objectives In this lecture we will focus on the representation of numbers and techniques for implementing arithmetic operations. Processors typically support two types of arithmetic: integer (or fixed point), and floating point. For both cases, we first examine the representation of numbers and then discusses arithmetic operations.

4. Computer ArchitectureFall 2008 © Arithmetic & Logic Unit °Does the calculations °Everything else in the computer is there to service this unit °Handles integers °May handle floating point (real) numbers °May be separate (math co-processor)

5. Computer ArchitectureFall 2008 © ALU Inputs and Outputs

6. Computer ArchitectureFall 2008 © Review: Decimal Numbers °Integer Representation number is sum of DIGIT * “place value” 2 10 0 d0d0 9 10 1 d1d1 7 10 2 d2d2 3 10 3 d3d3 0 10 4 d4d4 0 10 5 d5d5 0 10 6 d6d6 0 10 7 d7d7 3792 10 = 3  10 3 + 7  10 2 + 9  10 1 + 2  10 0 = 3000 + 700 + 90 + 2 Range 0 to 10 n - 1

7. Computer ArchitectureFall 2008 © Review: Decimal Numbers 3 7 9 2 + 0 5 3 1 °Adding two decimal numbers add by “place value”, one digit at a time 3792 + 531 ??? 1 “carry 1” because 9+3 = 12 0 4 3 2 3

8. Computer ArchitectureFall 2008 © Binary Numbers 0 2020 b0b0 0 2121 b1b1 1 2 b2b2 0 2323 b3b3 0 2424 b4b4 1 2525 b5b5 1 2626 b6b6 0 2727 b7b7 01100100 2 = 2 6 + 2 5 + 2 2 = 64 + 32 + 4 = 100 10 Range 0 to 2 n - 1 Humans can naturally count up to 10 values, but computers can count only up to 2 values (0 and 1) (Unsigned) Binary Integer Representation “base” of place values is 2, not 10

9. Computer ArchitectureFall 2008 © Binary Representation If a number is represented in n = 8-bits Value in Binary: Value in Decimal: 2 7.a 7 + 2 6.a 6 + 2 5.a 5 + 2 4.a 4 + 2 3.a 3 + 2 2.a 2 + 2 1.a 1 + 2 0.a 0 Value in Binary: Value in Decimal: 2 n-1.a n-1 + 2 n-2.a n-2 + … + 2 4.a 4 + 2 3.a 3 + 2 2.a 2 + 2 1.a 1 + 2 0.a 0 a7a7 a6a6 a5a5 a4a4 a3a3 a2a2 a1a1 a0a0 a n-1 a n-2 …a4a4 a3a3 a2a2 a1a1 a0a0

10. Computer ArchitectureFall 2008 © How to convert from decimal to binary? 4 23 63 46 001 0 2020 a0a0 0 2121 a1a1 1 2 a2a2 0 2323 a3a3 0 2424 a4a4 1 2525 a5a5 1 2626 a6a6 0 2727 a7a7 0 4 1.Find the biggest power of two smaller than the remaining number 2.Corresponding digit is one; subtract the number. 3.Other digits are zero

11. Computer ArchitectureFall 2008 © Binary Arithmetic A bits 1 1 1 0 B bits + 0 1 1 1 °Add up to 3 bits at a time per place value A and B “carry in” °Output 2 bits at a time sum bit for that place value “carry out” bit (becomes carry-in of next bit) °Can be done using a function with 3 inputs, 2 outputs carry-in bits1 1 1 0 0 sum bits 0 1 0 1 carry-out bits1 1 1 1 0 FA carry in carry out sum AB

12. Computer ArchitectureFall 2008 © Integer Representation °Only have 0 & 1 to represent everything °Positive numbers stored in binary e.g. 41=00101001 °No minus sign °No period °Sign-Magnitude °Two’s complement

13. Computer ArchitectureFall 2008 © Sign-Magnitude °Left most bit is sign bit °0 means positive °1 means negative °+18 = 00010010 ° -18 = 10010010 Problems: Need to consider both sign and magnitude in arithmetic Two representations of zero (+0 and -0)

14. Computer ArchitectureFall 2008 © Two’s Complement °+3 = 00000011 °+2 = 00000010 °+1 = 00000001 °+0 = 00000000 °-3 = 11111101 °-2 = 11111110 °-1 = 11111111 °-0 = 00000000

15. Computer ArchitectureFall 2008 © Two’s Complement °+3 = 00000011 °+2 = 00000010 °+1 = 00000001 °+0 = 00000000 °-3 = 11111101 °-2 = 11111110 °-1 = 11111111 °-0 = 00000000 If a number is represented in n = 8-bits Value in Binary: Value in Decimal: 2 7.a 7 + 2 6.a 6 + 2 5.a 5 + 2 4.a 4 + 2 3.a 3 + 2 2.a 2 + 2 1.a 1 + 2 0.a 0 a7a7 a6a6 a5a5 a4a4 a3a3 a2a2 a1a1 a0a0

16. Computer ArchitectureFall 2008 © Benefits °One representation of zero °Arithmetic works easily (see later) °Negating is fairly easy 3 = 00000011 Boolean complement gives11111100 Add 1 to LSB11111101

17. Computer ArchitectureFall 2008 © 2's complement °Only one representation for 0 °One more negative number than positive numbers 0000 0111 0011 1011 1111 1110 1101 1100 1010 1001 1000 0110 0101 0100 0010 0001 0 +1 +2 +3 +4 +5 +6 +7 -8 -7 -6 -5 -4 -3 -2 0 100 = + 4 1 100 = - 4 + -

18. Computer ArchitectureFall 2008 © Geometric Depiction of Two’s Complement Integers

19. Computer ArchitectureFall 2008 © Negation Special Case 1 ° 0 = 00000000 °Bitwise NOT 11111111 °Add 1 to LSB +1 °Result 1 00000000 °Overflow is ignored, so: °- 0 = 0 

20. Computer ArchitectureFall 2008 © Negation Special Case 2 °-128 = 10000000 °bitwise NOT 01111111 °Add 1 to LSB +1 °Result 10000000 °So: °-(-128) = -128 X °Monitor MSB (sign bit) °It should change during negation

21. Computer ArchitectureFall 2008 © Range of Numbers °8 bit 2’s complement +127 = 01111111 = 2 7 -1 -128 = 10000000 = -2 7 °16 bit 2’s complement +32767 = 011111111 11111111 = 2 15 - 1 -32768 = 100000000 00000000 = -2 15

22. Computer ArchitectureFall 2008 © Conversion Between Lengths °Positive number pack with leading zeros °+18 = 00010010 °+18 = 00000000 00010010 °Negative numbers pack with leading ones °-18 = 10010010 °-18 = 11111111 10010010 °i.e. pack with MSB (sign bit)

23. Computer ArchitectureFall 2008 © Addition and Subtraction °Normal binary addition °Monitor sign bit for overflow °Take two’s complement of subtrahend and add to minuend i.e. a - b = a + (-b) °So we only need addition and complement circuits

24. Computer ArchitectureFall 2008 © Binary Subtraction °2’s complement subtraction: add negative 0 1 0 1 +1 1 0 1 1 0 0 1 0 5 - 3 = 2 01010011 1100 1101 flip +1 -3 in 2’s complement form 2 ignore overflow 0 0 1 1 +1 0 1 1 1 1 1 0 3 - 5 = -2 0011 -5 in 2’s complement form 0101 1010 1011 flip +1 -2 0001 0010 flip +1 (flip+1 also gives positive of negative number)

25. Computer ArchitectureFall 2008 © Hardware for Addition and Subtraction

26. Computer ArchitectureFall 2008 © Multiplication °How about this algorithm: result = 0; While first number > 0 { add second number to result; decrement first number; } °Does it work? What is the complexity? °Can you think of a better approach? °Lets do an example 1001 x 100 What is this in decimal?

27. Computer ArchitectureFall 2008 © Multiplication – longhand algorithm °Just like you learned in school °For each digit, work out partial product (easy for binary!) °Take care with place value (column) °Add partial products °How to do it efficiently?

28. Computer ArchitectureFall 2008 © Example of shift and add multiplication 1011 x1101 1011 0000 01011 1011 110111 1011 10001111 °How many steps? °How do we implement this in hardware?

29. Computer ArchitectureFall 2008 © Unsigned Binary Multiplication

30. Computer ArchitectureFall 2008 © Execution of Example

31. Computer ArchitectureFall 2008 © Flowchart for Unsigned Binary Multiplication

32. Computer ArchitectureFall 2008 © Multiplying Negative Numbers °This does not work! °Solution 1 Convert to positive if required Multiply as above If signs were different, negate answer °Solution 2 Booth’s algorithm

33. Computer ArchitectureFall 2008 © Aside – cost of these operations °We’d like to be able to finish these operations quickly Usually in one cycle! °How do we implement add? Remember the 1 bit full adder? °How many adds do we need for a multiply? °Specialized logic circuits are used to implement these functionalities quickly (e.g., carry look-ahead adders, loop unrolled multiplication)