1. NC STATE UNIVERSITY Anantaraman © 2004RTSS–25 Enforcing Safety of Real-Time Schedules on Contemporary Processors using a Virtual Simple Architecture (VISA) Aravindh Anantaraman *, Kiran Seth †, Eric Rotenberg *, Frank Mueller ‡ Center for Embedded Systems Research (CESR) * Electrical & Computer Eng./ ‡ Computer Science North Carolina State University † Qualcomm. Inc

2. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Complexity in Hard-Real-Time Systems Worst-case execution time (WCET) crucial for schedulability analysis Contemporary processors are extremely complex –Branch prediction, pipelining, out-of-order execution –Improve average case performance –WCET unknown Complex processors not used in real-time systems

3. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Virtual Simple Architecture (VISA) Simple Processor Complex Processor Task X WCET = 10 ms Task X WCET = ?? (unreliable) Virtual Simple Architecture: give illusion of simple processor Task X WCET = 10 ms Novel non-literal approach to static timing analysis –Use simple processor as proxy for complex processor –Dynamically guarantee WCET

4. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Virtual Simple Architecture (VISA) Simple Processor Complex Processor Worst-case equivalent systems Task X WCET = 10 ms Virtual Simple Architecture: give illusion of simple processor Task X WCET = 10 ms 100% processor utilization worst case 100% processor utilization worst case dynamic slack actual exec. time = 8 ms actual case Exploit dynamic slack for power/energy savings, other functionality actual case actual exec. time = 3 ms dynamic slack

5. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Previous Approaches 1.Avoid complexity –VISA allows complex processors to be used 2.Disable complexity during hard-real-time tasks –VISA disables complexity only when problematic 3.Continue research in timing analysis –WCET of simple proxy improved

6. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 VISA Overview Provides real-time guarantees for contemporary processors Approach –Execute tasks optimistically on complex mode –Gauge interim progress –Safe back-up mode for anomalous scenarios

7. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Dual-Mode VISA Processor Dynamic branch predictor Static prediction Dynamic branch predictor Static prediction Complex mode - dynamic branch prediction - superscalar - out-of-order execution Simple mode - static branch prediction - scalar - in-order execution Complex mode - dynamic branch prediction - superscalar - out-of-order execution Simple mode - static branch prediction - scalar - in-order execution

8. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 VISA in Action WCEC 1 2 3 4 chk1 chk2chk3chk4WCEC’ 1 2 3 4 dynamic slack Non-speculative simple mode Successful speculation in complex mode headstart 1 Misspeculation in complex mode 2 3 4 (2) WCET preserved in spite of missed checkpoint $$$ cash back! simple mode complex mode

9. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Contributions Minimize headstart overhead Novel zero-overhead VISA approach – dynamic headstart accrual Extend VISA to multi-tasking systems Energy evaluation in multi-tasking systems

10. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Headstart Assessment chk1chk2 chk3chk4 headstart1 WCEC3 WCEC4 WCEC2 WCEC1 PEC1 chk1chk2 chk3chk4 headstart3 PEC1 PEC2 PEC3 WCEC3 WCEC4 simple mode complex mode

11. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Explicit Padding Approach Pad task WCEC with max headstart amount Give padded WCEC to schedulability analysis

12. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Dynamic Headstart Accrual Harness naturally occurring dynamic slack in simple mode as headstart  switch to complex mode

13. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Dynamic Headstart Accrual 1 2 3 4 Non-speculative simple mode WCEC 1 2 3 4 Successful speculation in complex mode chk3 chk4 Misspeculation in complex mode (3) 3 4 dynamic slack accrued slack > max (headstart 2,3,4 ) ? NO simple mode complex mode accrued slack > max (headstart 3,4 ) ? YES First simple mode, then complex mode No explicit headstart padding

14. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Dynamic Headstart Accrual 1 2 3 4 Non-speculative simple mode WCEC 1 2 chk3 chk4 Flexible: fluidly switch between simple and complex (3) 3 4 accrued slack > headstart 4 ? YES simple mode complex mode Re-enable speculation after missed checkpoint accrued slack > max (headstart 3,4 ) ? YES

15. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Explicit Padding vs. Dynamic Headstart Accrual Explicit padding + Guaranteed speculation –Inflated WCETs  Unschedulable task-sets Dynamic headstart accrual +S chedulability unaffected +Flexible switching –Dependent on dynamic slack in simple mode

16. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 VISA in Multi-Tasking Systems Gauging mechanism (watchdog counter) disrupted Adapt for multi-tasking –Interruption  save watchdog counter –Resumption  restore watchdog counter

17. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Easy Integration in Multi-Tasking Systems System software components depend on WCET EDF scheduler, DVS scheduler, etc. VISA preserves WCET abstraction We demonstrate VISA in a hard-real-time system with Look-Ahead EDF-DVS [Pillai&Shin’00]

18. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Look-Ahead EDF-DVS in VISA Simple processor VISA (Explicit padding) VISA (Dynamic headstart accrual)

19. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Experimental Methodology Cycle-accurate microarchitecture simulator Wattch power models to measure power/energy [Brooks01] 6 C-lab real-time benchmarks

20. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Energy Savings

21. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Average Frequencies

22. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 High Utilization Task-sets Worst-case utilization (unpadded WCETs) = 1.0 –Cannot use explicit padding  task-set unschedulable –Dynamic headstart accrual works!

23. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Energy Savings (U = 1)

24. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Coarse-grained vs. fine-grained sub-tasks Coarse-grained sub-tasks 1 1 2345678 234 Fine-grained sub-tasks

25. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Fine-grained vs. coarse-grained sub-tasks

26. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Summary VISA enables use of complex processors in safe real-time systems Headstart calculation Novel zero-overhead VISA speculation technique –dynamic headstart accrual VISA extended to multi-tasking systems 19% – 58% energy savings with respect to explicitly-safe simple processor

27. NC STATE UNIVERSITY Anantaraman © 2004 RTSS–25 Questions?