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EE105 Fall 2007Lecture 19, Slide 1Prof. Liu, UC Berkeley Lecture 19 OUTLINE Common-gate stage Source follower Reading: Chapter 7.3-7.4.

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Presentation on theme: "EE105 Fall 2007Lecture 19, Slide 1Prof. Liu, UC Berkeley Lecture 19 OUTLINE Common-gate stage Source follower Reading: Chapter 7.3-7.4."— Presentation transcript:

1 EE105 Fall 2007Lecture 19, Slide 1Prof. Liu, UC Berkeley Lecture 19 OUTLINE Common-gate stage Source follower Reading: Chapter 7.3-7.4

2 EE105 Fall 2007Lecture 19, Slide 2Prof. Liu, UC Berkeley Diode-Connected MOSFETs Note that the small-signal model of a PMOSFET is identical to that of an NMOSFET Diode-connected NMOSFET Small-signal analysis circuit Diode-connected PMOSFET

3 EE105 Fall 2007Lecture 19, Slide 3Prof. Liu, UC Berkeley Common-Gate Amplifier Stage An increase in V in decreases V GS and hence decreases I D.  The voltage drop across R D decreases  V out increases  The small-signal voltage gain (A v ) is positive.

4 EE105 Fall 2007Lecture 19, Slide 4Prof. Liu, UC Berkeley Operation in Saturation Region For M 1 to operate in saturation, V out cannot fall below V b -V TH.  Trade-off between headroom and voltage gain.

5 EE105 Fall 2007Lecture 19, Slide 5Prof. Liu, UC Berkeley I/O Impedances of CG Stage ( = 0) Small-signal analysis circuit for determining output resistance, R out Small-signal analysis circuit for determining input resistance, R in

6 EE105 Fall 2007Lecture 19, Slide 6Prof. Liu, UC Berkeley CG Stage with Source Resistance Small-signal equivalent circuit seen at input For  = 0:

7 EE105 Fall 2007Lecture 19, Slide 7Prof. Liu, UC Berkeley The output impedance of a CG stage with source resistance is identical to that of CS stage with degeneration. Small-signal analysis circuit for determining output resistance, R out

8 EE105 Fall 2007Lecture 19, Slide 8Prof. Liu, UC Berkeley CG Stage with Biasing R 1 and R 2 establish the gate bias voltage. R 3 provides a path for the bias current of M 1 to flow.

9 EE105 Fall 2007Lecture 19, Slide 9Prof. Liu, UC Berkeley CG Stage with Gate Resistance For low signal frequencies, the gate conducts no current.  Gate resistance does not affect the gain or I/O impedances.

10 EE105 Fall 2007Lecture 19, Slide 10Prof. Liu, UC Berkeley CG Stage Example Small-signal equivalent circuit seen at input Small-signal equivalent circuit seen at output

11 EE105 Fall 2007Lecture 19, Slide 11Prof. Liu, UC Berkeley Source Follower Stage Small-signal analysis circuit for determining voltage gain, A v Equivalent circuit

12 EE105 Fall 2007Lecture 19, Slide 12Prof. Liu, UC Berkeley Source Follower Example In this example, M 2 acts as a current source.

13 EE105 Fall 2007Lecture 19, Slide 13Prof. Liu, UC Berkeley R out of Source Follower The output impedance of a source follower is relatively low, whereas the input impedance is infinite (at low frequencies); thus, it is useful as a voltage buffer. Small-signal analysis circuit for determining output resistance, R out

14 EE105 Fall 2007Lecture 19, Slide 14Prof. Liu, UC Berkeley Source Follower with Biasing R G sets the gate voltage to V DD ; R S sets the drain current. (Solve the quadratic equation to obtain the value of I D.) Assuming = 0:

15 EE105 Fall 2007Lecture 19, Slide 15Prof. Liu, UC Berkeley Supply-Independent Biasing If R s is replaced by a current source, the drain current I D becomes independent of the supply voltage V DD.


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