1. ©2009 R. Gupta, UCSD CSE 91 Fall 2009 Embedded Systems Rajesh K. Gupta Computer Science and Engineering University of California, San Diego.

2. ©2009 R. Gupta, UCSD Topics We Will Discuss What are embedded systems? How do computers ‘interface’? What has that got to do with computers and ‘chips’? Hands-on Exercise: Do It Yourself Computing –How do we connect different components? –How do we program embedded systems? Keywords: Embedded Computer Programmable Systems Systems on Chip PSOC I2C, Serial, USB, ASCII ISA

3. ©2009 R. Gupta, UCSD

4. The Computing Experience The Computer Center –Mainframe computing The Personal Computer –Desktop, laptop, palm top computing The Ubiquitous Embedded Computer –Mobile, purpose-built.

5. ©2009 R. Gupta, UCSD Hardware Architecture & Organization Computer Architecture is how a builder/user sees it –How do you see your house? This building? –Instruction Set Architecture (ISA), Memory System Architecture Computer Organization refers to the structure of a computer: DataPathController control enables selects data conditions Memory CPU Address R/W Data

6. ©2009 R. Gupta, UCSD Software ‘Architecture’ Assembler Hardware Micro-operations Application Compiler Embedded Software And Configuration

7. ©2009 R. Gupta, UCSD A Personal Computer (PC) Uses commodity components and standard interfaces to build the machine Choose different components for performance, capacity, cost –Faster hard drive, processor, memory, interfaces

8. ©2009 R. Gupta, UCSD PC Components Case: –desktop, minitower, mid case, mid tower, full tower, large tower –include a power supply (typically 200 watts) CPU and CPU fan –sold as a chip Motherboard –single-board computer –contains place holders for CPU and Memories –Memory modules Interfaces –Video (card and monitor) –Others: (I/O card) “Floppy, CD-ROM, Keyboard, Hard drive, Sound card, Speakers, Modem, Tape/zip, Mouse”

9. ©2009 R. Gupta, UCSD 168-pin SDRAM 184-pin DDR-SDRAM The Stuff at Fry’s

10. ©2009 R. Gupta, UCSD Not at Fry’s Yet! Mani Srivastava, UCLA

11. ©2009 R. Gupta, UCSD Personal Computing “Low cost and general purpose” CPU MEM BUS CPU DATA BUS INST

12. ©2009 R. Gupta, UCSD Computer Organization CPU MEM BUS Devices Drives Input devices Output devices Networking Interface 1 2 3 4

13. ©2009 R. Gupta, UCSD Memory CPU MEM BUS Devices 2-3 GHz 50 ns SIMM PC2-5300 667 MHz DIMM

14. ©2009 R. Gupta, UCSD CPU – Memory Interaction DataPathController control enables selects data conditions Memory CPU Address R/W Data CPU controlled by a clock pulse. Memory is controlled by R/W control signals. CPU must synchronize its memory read, write operations with respect to its internal clock. Example: 5 MHz clock, 500 ns access time. Clock clock addrVALID select R/W’ VALIDdata WRITE CYCLE 200 ns 500 ns

15. ©2009 R. Gupta, UCSD A Processor’s Interfaces Two basic types –Communicate ‘via’ memory Sender writes to a memory location Receiver reads from that memory location –Communicate directly Sender and receivers connected by ‘ports’ How do we measure goodness of an interface? –Maximum data-rate of transfer? Bits or bytes per second?

16. ©2009 R. Gupta, UCSD What is this connector? 9-pin RS232C: DE-9 A “Serial” Port

17. ©2009 R. Gupta, UCSD Then What Are These?

18. ©2009 R. Gupta, UCSD From RS232c to USB “D-Sub” connectors –A: 15 pin –B: 25 pin –C: 37 pin –D: 50 pin –E: 9 pin RS232 was DB25 –RS232c was DE9 Specified by EIA in 1969 –Electricals (voltage levels) –Signaling rate, timing, slew-rate –Mechanicals –But not: character encoding, character framing, protocols Question 1: How many keys on your keyboard? Question 2: How many bits it will take to encode these?

19. ©2009 R. Gupta, UCSD What is ASCII? American Standard Code for Information Interchange –Published in 1963, revised 1967, 1986 128 characters, incl. 33 non-printing or control –94 printable characters: 26 + 10 + 11-25 symbols –Is SPACE printable? 8-bit extension by MAC OS Roman Unicode and Universal Character Set (UCS) –UTF-8, UTF-16, UTF-32

20. ©2009 R. Gupta, UCSD

21. Interface Basics 1.Who/Where to send/receive information? –Ports: mechanicals, electrical 2.What information to send? –Signals and Packets: Electrical signaling, logical encoding 3.How to send the information? –Protocols: synchronous, asynchronous How do we measure goodness of an interface?

22. ©2009 R. Gupta, UCSD 1. Ports Which door to knock at or open? All processors already have one door: memory –Memory-mapped IO They may have additional I/O ports –How are these ports identified? –How are devices connecting to these ports identified? Mechanically, Electrically, or at a ‘higher level’ Memory-mapped versus dedicated IO –What happens to CPU when I/O operation is in progress?

23. ©2009 R. Gupta, UCSD 2. Signaling How many wires? What do they carry? –Serial signaling: Send one bit at a time Direction of signaling: Half and Full Duplex –Synchronous versus Asynchronous Asynchronous serial communication –Send a START signal prior to each byte –And a STOP signal after each byte –Generally use more than 8-bit to transmit a byte (10 to 12) UART: Universal Asynchronous Receiver Transmitter –Again, no shared clock. The RX must lock onto data and detect individual bits –TX is a Parallel-to-Series converter RX is a Series-to-Parallel converter

24. ©2009 R. Gupta, UCSD 3. Protocols Request/Acknowledge Handshakes –RTS = Request to Send: Transmitter (TX) asserts RTS –CTS = Clear to Send: Receiver (RX) asserts CTS This gives you flow control –i.e., data transfer can proceed at a rate that is acceptable Let us examine two protocols –I2C and USB

25. ©2009 R. Gupta, UCSD I2C: inter-integrated circuit Two-wire –A microcontroller can control a network of devices with just two general-purpose IO pins and software. (upto a few meters) Connects multiple devices on a multi-drop bus Devices can be attached or detached without affecting other devices –7-bit address space, 16 reserved, 112 nodes maximum 10 kbps (low), 100 kbps, 400 kbps (fast), FM+ 1 Mbps, HS 3.4 Mbps ©2008 R. Gupta, UCSD

26. ©2009 R. Gupta, UCSD I2C Wires Two bidirectional wires –SDA: Serial Data –SCL: Serial Clock ‘Open drain’: normally high when not in use –MASTER node issues the SCL and addresses SLAVES –SLAVE node receives the SCL and the address –“Wired AND” logical function. ©2008 R. Gupta, UCSD

27. ©2009 R. Gupta, UCSD So, how do we write or read? Normally, both SDA and SCL are ‘high’ –“sense” before you drive a line A device that wants to write pulls SDA low –Followed by SCL going low So, everyone else knows that a transmission is starting ©2008 R. Gupta, UCSD

28. ©2009 R. Gupta, UCSD START, Data, Data,…,Data, STOP!

29. ©2009 R. Gupta, UCSD Putting it together Start Condition: With SCL low, SDA goes H  L Bits are ‘sampled’ on the rising edge of SCL Stop Condition: With SCL high, SDA goes L  H ©2008 R. Gupta, UCSD

30. ©2009 R. Gupta, UCSD I2C Protocol Any number of bytes in an I2C packet –MSB first, each bytes transmitted must be acknowledged by the receiver –After each 8 th bit, MASTER releases SDA and then generates an additional clock pulse on SCL Receiver can then acknowledge by pulling SDA low Receiver can always abort the transmission by holding SCL low –Can not go up by the MASTER, thus no bit sampling edge ©2008 R. Gupta, UCSD

31. ©2009 R. Gupta, UCSD Bi-directional Data Transfers

32. ©2009 R. Gupta, UCSD I2C Protocol Actions Master sends START –followed by 7-bit address of the Slave followed by single bit representing write to (0) or read from (1) the slave. Slave responds with ACK bit for that address –Master then continues in either TX or RX mode Communication transfer follows. All other MASTERS monitor START and STOP bits. ©2008 R. Gupta, UCSD

33. ©2009 R. Gupta, UCSD Note the direction of signaling

34. ©2009 R. Gupta, UCSD Standardizing the Standard: USB RS232C was not standard enough –Too much flexibility (on data rate, parity, flow control) USB: standardized the door and the lane –Software takes care of the data, information side –The ‘OS’ is aware of the device interface –Up to 127 devices. One standard cable. –Devices identify themselves. Not the interface. USB 1.1: 12 Mbps (Normal), 1.5 Mbps (Low) USB 2.0: 480 Mbps (High) USB 3.0: 4.8 Gbps (Super)

35. ©2009 R. Gupta, UCSD USB Shielded 4-wire cable One host in a network: host controller –Upstream versus downstream connection and connectors (A versus B) Host controller either directly connects to device (star) or through a hub (tiered star) –Because of the connectors, no device-to-device connections When a device is attached to the network –Based on its identification, the host OS determines the software driver to be used, –device is assigned a unique address and –host requests its internal configuration. 1VbusUSB device power (+5 V)Red 3D+Differential data lineGreen 2D-Differential data lineWhite 4GNDPower and signal groundBlack

36. ©2009 R. Gupta, UCSD Classes of Devices Host controller know about the following class of devices –Audio –HID –Hub –IrDA –Mass storage: HD, CDROM, DVD –Monitor –Communications –Physical interface device –Power –Printer –Imaging –Common class…

37. ©2009 R. Gupta, UCSD USB Packets All data transfers under the control of the host controller Four type of data transfers –Control transfer: configure the bus and devices on the bus –Bulk transfer: move data asynchronously –Isochronous transfer: move time-critical data (e.g, audio) –Interrupt transfer: retrieve data at regular intervals A packet contains –SYNC byte, Packet ID, Content, CRC Four type of packets –Token, data, handshake, preamble Defined processes for how a device is recognized, joins the network and how it communicates with the host controller.

38. ©2009 R. Gupta, UCSD Embedding Clock Recover clock from data Manchester Encoding –Each data bit (1 or a 0) has at least one transition –So, we can ‘recover’ clock from data

39. ©2009 R. Gupta, UCSD The Chip: A Packaged Part http://education.netpack-europe.org/chipp.php Quad Flat Pack (QFP) Ball Grid Array (BGA)

40. ©2009 R. Gupta, UCSD CypressPSoC 8-Bit CPU Core With RAM and ROM I/O Pins (Each port up to 8 bits) Blocks for processing Digital signals Blocks for processing Analog signals All “Toys” such as ADC’s, Timers, RS232, etc. are made out of configurable digital and analog blocks

41. ©2009 R. Gupta, UCSD What can you do with Digital/Analog Blocks? Analog-to-Digital Converters –8- to 14-bit resolution, multiple configurations Digital-to-Analog Converters –6- to 9-bit resolution Timers, Counters, PWMs –8- to 32-bit resolution Serial Interfaces –RS232, I2C, SPI Programmable Gain Amplifiers, Filters Random sequences Etc.

42. ©2009 R. Gupta, UCSD PSoC 29x66 Mechanical Characteristics 28 Pin – 3 I/O Ports 29x66-Series PSoCs come in five sizes. The primary difference is the number of I/O pins. PDIP – Plastic Dual Inline Package SSOP – Shrink Small Outline Package SOIC – Small Outline Integrated Circuit TQFP – Thin Quad Flat Pack QFN – Quad Flat No Leads 100 Pin – 8 I/O Ports 48 Pin – 6 I/O Ports 44 Pin – 5 I/O Ports

43. ©2009 R. Gupta, UCSD Key PSoC Electrical Characteristics Supply voltage either 3.3V or 5.0V –Built in controller (SMP) provides 3.3V from a single 1.5V battery or 5.0V from two 1.5V batteries Clock speed: 930 KHz – 24 MHz –Can use internal oscillator or external crystal Power usage (running): 15 – 70 mW –AA battery supplies about 2 Watt-Hours –Around 80 hours of life on one AA Power usage (sleep): 10 – 70 uW –Around 80,000 hours or 10 years of life on one AA

44. ©2009 R. Gupta, UCSD The PSoC CPU Core – M8C M8C CPU Core Executes instructions (arithmetic, logic, data movement, control) Modifies registers and memory Flash Memory – 32K Bytes in 29x66 Holds program code (nonvolatile!) Can be used to hold user data. Supervisory ROM Holds boot-up code and code to read from flash memory. Clock Sources 930KHz – 24MHz Provides basic timing for the CPU and peripheral devices. SRAM – 2048 Bytes in 29x66 Regular memory for use of CPU and peripherals. 256 bytes easily accessible – remainder requires paging. Interrupt Controller Allows external events to be communicated to the CPU System Bus – 8 Bits Wide Passes data between the CPU, memory, ports and peripherals

45. ©2009 R. Gupta, UCSD Hands-on Exercise Tasks –Design the ‘machine’ Actually, a ‘circuit’ that connects an LED to a control SWITCH You build the machine in a schematics editor (PSOC Designer) –Program the ‘machine’ Write the C-code for the program that will run on the machine. –Build the ‘machine’ Wire-wrap the connections Download the configuration and embedded code. VLSI/CAD, Computer Architecture Software, Programming, OS Prototyping In Embedded Systems we do it all, for a given purpose: Purpose Built Machines!

46. ©2009 R. Gupta, UCSD Design the machine: Find Components and Connect in Editor

47. ©2009 R. Gupta, UCSD Program the machine How do you make sure that the program never dies? –Repeat forever How do you sample the switch? –Read PORT as a collection of 8-bits –Extract the bit you want through a mask How do you turn ON, OFF the LED? –Make calls to LED routines (written in assembly – why?) Where is the Operating System? Where does the code reside?

48. ©2009 R. Gupta, UCSD Build the machine What is a HOST computer? What happens to the ‘programmer’ after the machine is built?