1. 1 COMP541 Arithmetic Circuits Montek Singh Mar 20, 2007

2. 2Topics  Adder circuits  How to subtract Why complemented representation works out so well Why complemented representation works out so well  Overflow

3. 3 Iterative Circuit  Like a hierachy, except functional blocks per bit

4. 4Adders  Great example of this type of design  Design 1-bit circuit, then expand  Let’s look at Half adder – 2-bit adder, no carry in Half adder – 2-bit adder, no carry in  Inputs are bits to be added  Outputs: result and possible carry Full adder – includes carry in, really a 3-bit adder Full adder – includes carry in, really a 3-bit adder

5. 5 Half Adder  S = X  Y  C = XY

6. 6 Full Adder  Three inputs. Third is Cin  Two outputs: sum and carry

7. 7 Two Half Adders (and an OR)

8. 8 Ripple-Carry Adder  Straightforward – connect full adders  Carry-out to carry-in chain C 0 in case this is part of larger chain, or just ‘0’ C 0 in case this is part of larger chain, or just ‘0’

9. 9 Hierarchical 4-Bit Adder  We can easily use hierarchy here  Design half adder  Use in full adder  Use full adder in 4-bit adder  Verilog code in textbook

10. 10 Behavioral Verilog // 4-bit Adder: Behavioral Verilog module adder_4_b_v(A, B, C0, S, C4); input[3:0] A, B; input C0; output[3:0] S; output C4; assign {C4, S} = A + B + C0; endmodule Addition (unsigned) Concatenation operation

11. 11 What’s Problem with Design?  Delay Approx how much? Approx how much?  Imagine a 64-bit adder Look at carry chain Look at carry chain

12. 12 Carry Lookahead Adder  Note that add itself just 2 level  Idea is to separate carry from adder function Then make carry approx 2-level all way across larger adder Then make carry approx 2-level all way across larger adder

13. 13 Four-bit Ripple Carry Adder function separated from carry Notice adder has A, B, C in and S out, as well as G,P out. Reference

14. 14Propagate  The P signal is called propagate  P = A  B  Means to propagate incoming carry

15. 15 What Does This Mean?  No Carry Here  So the propagate signal indicates that condition of incoming should pass on

16. 16Generate  The G is generate  It’s G = AB, so new carry created  So it’s ORed with incoming carry

17. 17 Said Differently  If A  B and there’s incoming carry, carry will be propagated And S will be 0, of course And S will be 0, of course  If AB, then will create carry Incoming will determine whether S is 0 or 1 Incoming will determine whether S is 0 or 1

18. 18 Ripple Carry Delay: 8 Gates

19. 19 Turn Into Two Gate Delays  Design changed from deep (in delay) to wide

20. 20 C 1 Just Like Ripple Carry

21. 21 C 2 Circuit Two Levels G from before and P to pass on This checks two propagates and a carry in

22. 22 C 3 Circuit Two Levels G from before and P to pass on This checks three propagates and a carry in Generate from level 0 and two propagates

23. 23 What Happens as Scale Up?  Can I realistically make 64-bit adder like this?  Have to AND 63 propagates and C in !  Compromise Hierarchical design Hierarchical design More levels of gates More levels of gates

24. 24 Making 4-Bit Adder Module  Create propagate and generate signals for whole module

25. 25 Group Propagate  Make propagate of whole 4-bit block  P 0-3 = P 3 P 2 P 1 P 0

26. 26 Group Generate  Does G created upstream pass on because of string of Ps (also G 3 )?  Indicates carry generated in block

27. 27 Hierarchical Carry 4-bit adder AB SGPC in 4-bit adder AB SGPC in C0C0 Look Ahead C8C8 C4C4 Left lookahead block is exercise for you

28. 28 Practical Matters  FPGAs like ours have limited inputs per block  Instead they have special circuits to make adders  So don’t expect to see same results as theory would suggest

29. 29 On to Subtraction  First, look at unsigned numbers Motivates why we typically use complemented representation Motivates why we typically use complemented representation  Then look at 2s complement  Imagine a subtractor circuit (next)

30. 30 One-bit Subtractor  Inputs: Borrow in, minuend and subtrahend Review: subtrahend is subtracted from minuend Review: subtrahend is subtracted from minuend  Outputs: Difference, borrow out  Could use like adder  One per bit 1-bit sub MS B out D B in

31. 31ExampleBorrow100 Minuend0 11 Subtrahend110 Difference101 Correct Diff - 011 If no borrow, then result is non-negative (minuend >= subtrahend). Since there is borrow, result must be negative. The magnitude must be corrected. Next slide.

32. 32 Correcting Result  What, mathematically, does it mean to borrow?  If borrowing at digit i-1 you are adding 2 i  Next Slide

33. 33 Correcting Result 2  If M is minuend and N subtrahend of numbers length n, difference was 2 n + M – N 2 n + M – N  What we want is magnitude of N-M (with minus sign in front)  Can get by subtracting previous result from 2 n N - M = 2 n – (M – N + 2 n ) N - M = 2 n – (M – N + 2 n ) This is called 2’s complement

34. 34 Put Another Way  This is equivalent to how we do subtraction in our heads Decide which is greater Decide which is greater Swap if necessary Swap if necessary Subtract Subtract  Could build a circuit this way… Or just look at borrow bit Or just look at borrow bit

35. 35Algorithm 1. Subtract N from M 2. If no borrow, then M  N and result is OK 3. Otherwise, N > M so result must be subtracted from 2 n (and minus sign prepended)

36. 36 Pretty Expensive Hardware!

37. 37 That Complex Design not Used  That’s why people use complemented interpretation for numbers 2’s complement 2’s complement 1’s complement 1’s complement

38. 38 1’s Complement  Given: binary number N with n digits  1’s complement defined as (2 n – 1) - N 2 n - 1 1111111 - N 1011001 1’s Compl. 0100110

39. 39 2’s Complement  Given: binary number N with n digits  2’s complement defined as 2 n – N for N  0 0 for N = 0 Exception is so result will always have n bits Exception is so result will always have n bits  2’s complement is just a 1 added to 1’s complement

40. 40 Important Property  Complement of a complement generates original number  NOTE: We haven’t talked about negative numbers yet. Still looking at unsigned  Let’s look at new design for subtractor

41. 41 New Algorithm for M-N 1. Add 2’s complement of N to M This is M + (2 n – N) = M – N + 2 n This is M + (2 n – N) = M – N + 2 n 2. If M  N, will generate carry (why?) Discard carry Discard carry Result is positive M - N Result is positive M - N 3. If M < N, no end carry (why?) Take 2’s complement of result Take 2’s complement of result Place minus sign in front Place minus sign in front

42. 42Example  X = 101_0100 minus Y = 100_0011 X1010100 + 2’s comp Y 0111101 Sum10010001

43. 43 Example 2  Y = 100_0011 minus X = 101_0100  No end carry  Answer: - (2’s complement of Sum)  - 0010001 Y1000011 + 2’s comp X 0101100 Sum 1101111

44. 44Adder-Subtractor  Need only adder and complementer for input to subtract  Need selective complementer to make negative output back from 2’s complement Or go through adder again. See next slide Or go through adder again. See next slide

45. 45 Design of Adder/Subtractor  Output is 2’s complement if B > A Inverts each bit of B if S is 1 Adds 1 to make 2’s complement S low for add, high for subtract

46. 46 Signed Arithmetic  Review characteristics of signed representations  Signed magnitude Left bit is sign, 0 positive, 1 negative Left bit is sign, 0 positive, 1 negative Other bits are number Other bits are number  2’s complement  1’s complement

47. 47Observations  1’s C and Signed Mag have two zeros  2’s C has more negative than positive  All negative numbers have 1 in high-order

48. 48Advantages/Disadvantages  Signed magnitude has problem that we need to correct after subtraction  One’s complement has a positive and negative zero  Two’s complement is most popular Arithmetic operations easy Arithmetic operations easy

49. 49 Conclusion: 2’s Complement  Addition easy on any combination of positive and negative numbers  To subtract Take 2’s complement of subtrahend Take 2’s complement of subtrahend Add Add This performs A + ( -B), same as A – B This performs A + ( -B), same as A – B

50. 50Overflow  Two cases of overflow for addition of signed numbers Two large positive numbers overflow into sign bit Two large positive numbers overflow into sign bit  Not enough room for result Two large negative numbers added Two large negative numbers added  Same – not enough bits  Carry out can be OK

51. 51Examples  4-bit signed numbers  7 + 7  7 – 7 Generates carry but result OK Generates carry but result OK  -7 -7  4 + 4 Generates no C out, but overflowed Generates no C out, but overflowed

52. 52 Overflow Detection  Condition is that either C n-1 or C n is high, but not both