1. Synchronous circuit design and analysis

2. Synchronous circuit design To implement a synchronous circuit corresponding to a given specification Revision of Yr 2 notes (copy on web) Wakerly 7.4

3. Design procedure 1.Construct state diagram - state table 2.State minimisation (optional) 3.Choose state variables - State assignment 4.Assigned state table 5.Choose flip-flop type 6.Determine f/f input values (excitation table) 7.Derive f/f input equations 8.Derive output equations 9.Implement (required component types, initialisation …) 10.Verify operation and performance

4. State minimisation Once a state diagram/table has been constructed, the number of states is fixed – however, the designer may have constructed a diagram in which some states are equivalent and hence redundant… If the number of states can be reduced – - the number of flipflops may be reduced - the number of don’t-cares in the state table may be increased

5. Equivalence… Two states are equivalent if they have the same next states and outputs (and are not ‘not equivalent’…) This may not always be obvious by examination and a systematic technique uses an ‘Implication Chart’

6. Implication chart Consider Wakerly Fig 7-51 S00011110Z S1S2 S3 0 S2S4 S3 0 S2 S5 0 S4 S7S31 S5S2S6S5 1 S6S4 S7S31 S7S2S6S5 1

7. Implication chart (2) To construct the chart we derive all non-equivalent (incompatible) pairs of states - Mark (X) any state pairs which have different o/p values - Mark (  ) any pairs which are identical (4,6) (5,7) - Complete the chart by… S2 S3 S4XXX S5XXX S6XXX  S7XXX  S1S2S3S4S5S6 S00011110Z S1S2 S3 0 S2S4 S3 0 S2 S5 0 S4 S7S31 S5S2S6S5 1 S6S4 S7S31 S7S2S6S5 1

8. Implication chart (3) - Complete the chart by considering each remaining pair and entering the necessary equivalent pairs eg, for S1 to be equivalent to S2, we require that S2  S4 As this is not true, S1 and S2 are not equivalent … S00011110Z S1S2 S3 0 S2S4 S3 0 S2 S5 0 S4 S7S31 S5S2S6S5 1 S6S4 S7S31 S7S2S6S5 1 S2 S2,S4 X S3 S3,S5 X S2,S4 S3,S5 X S4XXX S5XXX S2,S4 S4,S6 S7,S3 S3,S5 X S6XXX  S2,S4 S4,S6 S7,S3 S3,S5 X S7XXX S2,S4 S4,S6 S7,S3 S3,S5 X  S2,S4 S4,S6 S7,S3 S3,S5 X S1S2S3S4S5S6

9. Implication chart (4) S00011110Z S1S2 S3 0 S2S4 S3 0 S2 S5 0 S4 S7S31 S5S2S6S5 1 S6S4 S7S31 S7S2S6S5 1 In this example, S4  S6 and S5  S7 – reducing 7 states to 5 S00011110Z S1S2 S3 0 S2S4 S3 0 S2 S5 0 S4 S5S31 S5S2S4S5 1  Note that equivalence is transitive, so if A  B and B  C then A  B  C This method can also be extended to incompletely-specified tables, containing don’t-care terms…

10. State assignment The minimum number of flip-flops needed to encode N states is  log 2 N  There are many possible assignments of binary codes to states, each leading to a different circuit… The state assignment problem is to choose an ‘optimum’ assignment (typically leading to a minimum-cost circuit)

11. State assignment (2) In practice, a ‘good’ state assignment is found using rules-of thumb, for example – 1. If two or more states have the same next state, they should be given adjacent assignments 2. If two states are both next states of a present state, they should be given adjacent assignments

12. State assignment (3) Consider Table 7.6 S00011110Z S1S2 S3 0 S2S4 S3 0 S2 S5 0 S4 S5S31 S5S2S4S5 1 From Rule 1From Rule 2 Next state reached fromPresent state reaches 1- 12, 3 21, 3, 5 23, 4 31, 2, 4 32, 5 42, 4, 5 43, 4, 5 53, 4, 5 52, 4, 5 Cant satisfy all these, but rule 1 takes priority

13. State assignment (4) The ‘good’ state assignment is now made by trying to assign adjacent codes to adjacent states, for example… Implementing this assignment (using D-types) requires 14 literals – compared with 19 for a simple binary assignment Better – not best? S1 000 - chosen for ease of initialisation S2 001 S3 111 - other states chosen to satisfy rule 1 S4 011 - note that not all requirements can S5 101 be satisfied, eg, S1 and S3

14. State assignment (5) It is also possible to deliberately choose an assignment which uses more than the minimum number of flipflops in order to easily generate outputs indicating a specific state (or states) For example, ‘one-hot’ assignment Also remember to consider don’t-care and initial (reset) states

15. Analysis of state machines Sometimes we may need to ‘reverse engineer’ a circuit – and derive a state diagram from a given circuit Procedure - 1.Determine the next-state and output functions 2.Construct the state table 3.Construct the state diagram (optional)

16. Analysis example (1) Fig 7-38

17. Analysis example (2) Determine Next state and Output functions From diagram – Excitation equations Substituting Q*=D to get equations for state variables

18. Analysis example (3) Output equation - The state table can now be constructed by evaluating the equations for every combination of state and input -

19. Analysis example (4) State diagram - The design may now be modified and re-synthesised…