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Reconfigurable Architectures
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2 Granularity of Reconfigurable Systems Granularity: The abstraction level used to configure the device. May use a −Boolean-level, −instruction-level, −function-level, −process-level representation.
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3 Granularity of Reconfigurable Systems Granularity: Proportional to the length of a configuration: −Fine/low-grain: long configuration −Course grain (high-level granularity): short configuration Fine-grain (Boolean-level) architecture: FPGA: −Primary computational elements: limited-input LUTs Suitable for simple to complex Boolean functions. −Inefficient for complex functions like multipliers Instruction-level: Has computational units that perform instruction-level operations Units vary from byte-width to word-width (32-bit) datapath operations. Units rarely have states: −Read from registers and written to registers Efficient for performing instructions but inefficient at performing Boolean operations.
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4 Granularity Freedom of device: Instruction-level granularity only allows a limited number of register locations and small number of operations (on those locations) Lower granularity level allows more locations and different complex customized FUs. −Can implement complex functions by a number of LUTs. Efficiency: The more closely the application operation is matched to the granularity, the more efficient the device will execute. Example: DSP application needs a lot of word-size add and mult. − instruction-level granularity. Application with a lot of Boolean operations: − Boolean-level granularity.
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5 Granularity Functional-level: Units are complex multi-cycle operations −Extensible processors with customized instructions. Process-level: Extremely complex processes which often take 100- 1000 cycles to complete. Example: −A cryptography device which decides on the algorithm based on the input key.
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6 Hybrid Devices Recent commercial FPGA devices with multiple levels of granularity: LUTs, Dedicated adders/multipliers, DSP units.
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7 Granularity Course-grained reconfigurable devices (rDPA) Fine-grained reconfigurable devices (FPGA) [Hartenstein07]
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8 Area Efficiency
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9 References [Hartenstein07] Hartenstein, “Basics of Reconfigurable Computing,” S. P. J. Henkel, Ed. New York: Springer- Verlag, 2007. [Kastner04] Kastner, Kaplan, Sarrafzadeh, “Synthesis techniques and optimizations for reconfigurable systems,” Kluwer, 2004.
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